Fall Forward

By Paul Dempsey |  No Comments  |  Posted: August 23, 2011
Topics/Categories: no topics assigned  |  Tags:

The post-DAC period often throws up interesting stuff that can get lost in those brief few weeks before the summer vacation strikes.

In the corporate world, this year we had Ansys’ $310M acquisition of Apache Design Solutions. However, given that some kind of deal involving Apache had been mooted before DAC as well—and the size of the buy—I don’t think too many of you will have missed that one.

At the structural level though, what’s caught my eye is the proposed merger of Accellera and the Open SystemC Initiative (OSCI).

Accellera has been a busy beast of late. Its ‘peace breaks out’ work on the Universal Verification Methodology (discussed in this issue on page 12) responds to a core demand from the user community. Interestingly enough, many of those same users now want a coordinated path combining SystemC with UVM.

That last point says a lot. One of the big takeaways from DAC was the degree to which ESL has moved into the mainstream (at last!) and how not just SystemC but also technologies like transaction-level modeling are playing an ever greater role in chip design.

The ESL Symposium in San Diego made it clear that many companies now see ESL as a ‘must have’ but also that many questions remain about its breadth and maturity. Comprehensive standards—particularly some that reach upward from the more familiar (and Accellera-dominated) world of RTL—could be a real help here. In that context, a few EDA movers and shakers had been pushing the Accellera-OSCI link-up for a while.

Appropriately, the agreement is being presented as a marriage of equals, with the merger’s completion due some time in the fourth quarter.

Elsewhere, verification is the main theme in this issue. Apart from turning the spotlight on UVM, we also get some practical thoughts from Mentor Graphics and STMicroelectronics.

Beyond that, we take a look at how July’s Semicon West reflected the latest thinking in the finFET (trigate)/depleted silicon-on-insulator debate, at how companies explore the ROI on their advanced DFM activities and more besides. And we preview this month’s International Test Conference as it moves to a much earlier date than usual, while also looking back on NI Week, the National Instruments’ user event.

Comments are closed.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors