A common methodology to manage X propagation in both design and verification
The propagation of unknown (X) states has become a
more pressing issue with the move toward billion-gate SoC designs. The sheer complexity and the common use of complex power management schemes increase the likelihood of an unknown ‘X’ state translating into a functional bug in the final chip.
X propagation woes
This paper presents a complete and practical methodology to comprehensively solve the X problem in RTL design. It reviews common sources of Xs and describes how they cause functional bugs as well as excess debug cycles.
Reset optimization pays big dividends before simulation
Reset is no longer simply an ‘X’ issue but also feeds into power optimization. Catching issues early greatly speeds verification.
by Pranav Ashar
New 2014 Ascent XV Release: Faster, Easier Debug
Lisa Piper: When unknown values propagate
Building an RTL sign-off flow
by Graham Bell