The antifuse advantage for one-time programmable non-volatile memory

By Krishna Balachandran |  No Comments  |  Posted: December 14, 2018
Topics/Categories: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,  | Organizations:

Antifuse-based OTP NVM is highly scalable, has the area efficiency to enable macros  of megabit capacities, and offers low read power.

Non-volatile memory (NVM) is used in applications for the automotive, mil-aero, power management, mobile, and Internet of Things markets, to store anything from a few bits of authentication information, to product configurations, device calibrations, or even firmware.

NVM is offered in variants that can be programmed only once (OTP), a few times, or as often as you want. Many applications don’t need re-programmable memory, and so OTP has become the preferred embedded NVM because it is widely available in CMOS processes, is scalable, reliable, and secure.

Embedded OTP NVM can be based on floating-gate, e-fuse, or antifuse technology, each of which has advantages and drawbacks. Designers choosing an embedded NVM technology should consider its specification, scalability, reliability, and availability on the target manufacturing process. Other issues, such as the memory’s required endurance, access time, programming time, operating temperature, and voltage, should also be taken into consideration.

Floating-Gate OTP NVM

Traditional OTP NVMs trap charge on a floating gate to store a binary digit, and depletes the charge to erase it. Trapping and depleting charge requires high supply voltages, while creating a floating gate and its associated insulating oxide means adding manufacturing steps to a standard CMOS process. Floating-gate OTP NVM scales well down to the 130nm process node, but becomes uncompetitive in area and performance at smaller process nodes. Scalability to finFET nodes may not even be viable. The data in a floating-gate OTP NVM can also be erased by exposure to ultraviolet light or radiation, giving hackers an opportunity to manipulate its value.

Electric fuse OTP NVM

Electric fuse (e-fuse) based OTP NVM became mainstream with the introduction of submicron processes, because it scales better than the floating-gate alternative. These memories were initially based upon polysilicon, but this has since been replaced by metal fuses programmed by exploiting the phenomenon of electromigration. In these devices, each OTP cell is made up of a continuous metal shape etched on the silicon’s surface. When a voltage is applied to selected shapes, electromigration causes enough metal atoms to move that open circuits are formed where needed. Since this approach does not rely upon a stored charge, it is difficult to reverse-engineer the state of the cell.

The e-fuse approach does not scale well into deep submicron and finFET processes, and it takes a lot of die area to build larger-capacity OTP NVMs. The e-fuse approach also suffers from high leakage currents in standby mode. Electromigration can also cause e-fuses to re-grow a connection, corrupting the information the NVM holds. These drawbacks have caused designers and foundries to look for alternatives.

Antifuse OTP NVM

Antifuse-based OTP NVM exploits the phenomenon of oxide breakdown to create its programming element, and can be included in standard CMOS processes without additional process steps. The antifuse element also follows the same rules as electrical and layout design rules as standard logic, with proven scalability down to the 7nm process node. The antifuse element also benefits from the same yield and reliability gains as other elements of a maturing process node, and this is also true for finFET processes.

An antifuse OTP element works by exploiting the thinner core oxide and the thicker I/O oxide available in standard CMOS processes. It is programmed by applying a high voltage to its gate, which causes the thinner core oxide to break down and create a short circuit. This process is robust and reliable, unlike e-fuses, which may suffer from regrowth over time.

The antifuse OTP doesn’t rely on storing charge, and so is not susceptible to hacking techniques based on altering the device’s supply voltage or temperature. Oxide breakdown is also invisible to electron microscopy, so the NVM cell’s state cannot be read out that way. Antifuse OTP NVMs are area-efficient, and have the lowest leakage power of the OTP NVM technologies. Programming time and read-access time are fast enough to satisfy the needs of many high-performance designs.

Antifuse OTP NVM applications

Antifuse-based OTP NVM is highly scalable, has the area efficiency to enable macros  of megabit capacities, and offers low read power. It also has good tolerance to high voltages and temperatures, as well as high security. Antifuse OTP NVM can therefore replace floating-gate or e-fuse technologies for tasks such as secure key storage, device IDs, analog/sensor trimming and calibration, and code storage. These applications can require memory capacities from a few bits to multiple megabits.

The advantages of antifuse OTP NVM

It doesn’t take much energy to read antifuse OTP NVM or hold it in standby mode, so it is useful for battery-powered devices. The persistent nature of antifuse-based OTP NVM and its low read energy also means that it can be the first circuit to become active as an SoC’s power supplies switch on, which has useful implications for security.

Ensuring the security of stored information is vital to many applications, especially in safety-critical systems in the automotive, mil-aero, and medical device markets. Mobile and home entertainment devices often need user authentication to maintain the integrity of financial transactions and to control access to media. Antifuse-based OTP NVM relies on a physical mechanism that intrinsically offers good security,  and this can be enhanced by careful design to further obstruct reverse engineering.

Properly tested and qualified antifuse OTP NVM also offers good reliability, even in automotive and industrial applications operating at junction temperatures of up to 175°C.

DesignWare OTP NVM IP

The Synopsys DesignWare OTP NVM IP portfolio is based on patented one- or two-transistor antifuse bit cells that have a small silicon footprint. The NVM IP has features to protect it against passive and active attacks, tampering, hacking, and reverse engineering. Customizable macros enable design flexibility for the target application to execute code storage, security, trimming, calibration, and configuration functions.

The Synopsys DesignWare OTP NVM IP is qualified to work at automotive AEC-Q100 grade 0 and 1 temperatures. It is available from TSMC, SMIC, UMC, and GLOBALFOUNDRIES, on processes ranging from 180nm to 7nm finFET.

About the author

Krishna Balachandran is a product marketing manager at Synopsys.

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