Complete system-on-chip (SoC) design assembly, configuration and verification environments emerged in the 1990s to address an increasing design gap between the capacity of silicon and the ability of engineering teams to fill that gap meaningfully with optimized system designs. Despite the need being addressed by these early environments, adoption was slow.
In this context, two major obstacles were apparent. There was no standard environment-neutral description for design intellectual property (IP) that enabled its rapid re-use in a variety of tools; and it was difficult to exchange SoC architectural data between design tools in a multi-vendor design-flow.
The SPIRIT Consortium, launched at the 2003 Design Automation Conference (DAC), was formed to resolve the needs of an integrated front-end multi-vendor system design flow. Deployment of the early specifications from the consortium into EDA tools and IP has been very successful, providing recognized time-to-market (TTM) benefits for system-design houses. Building on this success, SPIRIT is looking to make an even greater contribution to the industry over the near future.
The announcement of the consortium’s formation at DAC 2003 came after several months of discussion among the original steering committee companies including ARM, Cadence Design Systems, Mentor Graphics, Philips Semiconductors, STMicroelectronics, and Synopsys.
These companies signed-up for the initiative because they all supported one simple premise: the design of complex systems-on-chip was getting significantly harder, and building an IP-reuse solution to this problem required an improved integration of multi-vendor design flows and better interoperability of reusable IP.
The consortium chose to resolve this by creating a standard language-neutral description for IP and SoC designs that could be exchanged between tools. And so was born the IP-XACT design-exchange standard.
IP-XACT is a new, simple-to-create and machine-readable deliverable to accompany IP design files such as those written in Verilog, VHDL, SystemVerilog, and other popular design languages. It is built on established W3C standards for the capture of meta-data used across multiple platforms and applications.
The initial major technology contribution to IP-XACT came from Mentor Graphics. The first version of the specification was delivered for public download in December 2004 accompanied by live demonstrations of multi-vendor SoC design architecture exchange.
Since December 2004, with a meta-data schema-contribution from Synopsys for design-constraint mark-up and various further contributions from the other Contributing Members, SPIRIT has delivered a v1.2 specification which is complete and industrially proven for full SoC RTL design and verification. This specification has been delivered into the IEEE P1685 process for official technical standardization, with IEEE ratification expected in the first half of 2007.
SPIRIT’s ability to produce timely, comprehensively tested technical deliverables has helped build the organization’s international membership today to well over 50 companies. This includes comprehensive representation from the major tools and IP providers in the industry.
In January 2006, LSI Logic was added to the the SPIRIT Consortium Steering Committee roster and in June 2006, the Semiconductor Technology Academic Research Center (STARC), became the first Japanese Associate Member extending IP-XACT applications into commercial R&D.
Proven success for IP-XACT deployment
The current v1.2 specifications of IP-XACT have already been deployed across a significant number of platform development flows. At Philips Semiconductor, for example, a completely new SoC flow has been created leveraging the specifications. The multi-stage, multi-vendor design flow is based on industry tooling and allows automated integration and verification of IP components from several sources. This has been made possible by SPIRIT’s delivery of industry standards that are enabling an open market for tool and IP interoperability.
The IP-XACT-based design environment now in use at Philips, Nx-Builder, utilizes tools and IP from various providers that are coordinated through a cockpit framework which drives SoC design preparation for RTL simulation and verification, models integration, system test-case creation, synthesis, static timing analysis and design-for-test (DFT) insertion.
With new elements being added to the IP-XACT specifications over the coming year, the multi-stage design flow integration will be extended to cover abstract system-level simulation and verification as well as back-end design steps.
Nx-Builder has proven its efficiency and value in the development of two complex chips during 2005, one in the automotive domain and the other as a platform for advanced communication SoCs using the ARM11 processor family and the AMBA3 AXI interconnect standard. Both chips were taped out and fully functional with the first spin.
The Nx-Builder methodology is providing an overall time-to-silicon improvement of between 25% for a new design, and 50% for a platform derivative. This design success is driving the increased deployment of the IP-XACT-enabled Nx-Builder design methodology across multiple business units at Philips Semiconductors.
Figure 1. Breaking down the design-flow benefits of the IP-XACT specifications
Figure 1 shows how, at Philips Semiconductors, the multi-vendor design automation enabled through IP-XACT provides benefits to many aspects of the design and verification flow.
Automated validation of the top-level interconnects leads the list of benefits for the system designer, contributing around 30% of the overall TTM advantage. Automated flow scripting and documentation extraction together provide an additional 40% of the TTM improvement as IP-XACT helps to eliminate fault-prone tool configuration steps and enables automated documentation updates.
The SPIRIT Consortium has proven that it has an important role to play in the industry for enabling multi-vendor design flow and IP integration. The consortium is committed to further developing this contribution to improved SoC design efficiency, and, at DAC 2006, formalized operations with its official launch as a California non-profit organization.
Work on future deliverables has already started in the consortium, beginning with the extension of the IP-XACT meta-data deliverables into multiple other front-end SoC design-flow integration fields. In the fourth quarter of 2006, SPIRIT will provide its IP-XACT ESL Extensions to cover transaction-level model abstraction hierarchies, including the ability to handle SystemC and SystemVerilog IP models, as well as a complete meta-data database API to address IP generator and point-tool integration into arbitrary design environments.
The consortium is also looking to extend the application of IP-XACT into debug configuration, and the support of design constraints that guarantee SoC architectural consistency into back-end databases and design automation environments.
Extending the application of design meta-data into ESL, embedded-software debugging, and hardware constraints is creating new challenges and opportunities for the consortium. In all these areas, there are recognized standards bodies that produce key deliverables, and maintain fundamental communication between the necessary commercial and research institutes. Design meta-data is a complementary technology to all of these standards, and the consortium is actively engaging with these recognized bodies to ensure that IP-XACT deployment aligns with their work.
In particular, the Silicon Integration Initiative (Si2) and the consortium have jointly announced a project to align the IP-XACT system descriptions with constraint standards for the flow to hardware implementation. More alignment announcements relating to debugging and ESL will follow in 2006.
The IP-XACT specifications are freely downloadable today from the consortium’s Web-site, www.spiritconsortium.org. SPIRIT is also actively recruiting new Reviewing and Contributing Members to help in the creation of the next version of the IP-XACT specifications. The new classification of Associate Membership is enabling not-for-profit research organizations and academic institutes to become involved.
The consortium’s membership believes that enabling design-flow integration and automated IP configuration, assembly and verification is critical to bridging the system-to-silicon design-gap. There is a strong future for the IP-XACT specifications as the key IP meta-data and tool exchange format for the complete integrated multi-vendor embedded systems design flow.