{"id":9642,"date":"2017-10-27T02:15:50","date_gmt":"2017-10-27T02:15:50","guid":{"rendered":"https:\/\/www.techdesignforums.com\/practice\/?p=9642"},"modified":"2017-10-27T02:16:29","modified_gmt":"2017-10-27T02:16:29","slug":"catch-patterning-errors-early-toward-10nm","status":"publish","type":"post","link":"https:\/\/www.techdesignforums.com\/practice\/technique\/catch-patterning-errors-early-toward-10nm\/","title":{"rendered":"Catch multi-patterning errors clearly at advanced nodes"},"content":{"rendered":"

When double patterning (DP) was introduced for 20nm processes, the DP layers had relatively simple and straightforward constraints on the spacing between the two exposures. These constraints were captured in design rules and expressed to the DP engine through opposite mask requirements. But DP layer rules are getting more complex for smaller nodes, with some layers requiring triple or quadruple patterning, and even DP layers are encountering fundamental new constraints.<\/p>\n

DP verification tools have evolved to keep pace but detecting multi-patterning errors is only one piece of the solution verification engineers need. They also need a powerful debug capability driven by well-designed visualization to make sense of the complexity of multi-patterning verification errors at advanced nodes.<\/p>\n

Consider the following DP constraint changes in advanced nodes: opposite-mask spacing; forbidden pitches; and double-spaced lines.<\/p>\n

Opposite-mask spacing<\/h4>\n

The first big change is opposite-mask spacing<\/em>. This expands the idea of minimum same-mask spacing to minimum opposite-mask spacing. At 20, 16 and 14nm, the minimum opposite-mask spacing requirements, combined with the minimum polygon width requirements, create a pitch in which the second-neighbor shape is always more than the minimum same-mask distance away (Figure 1).<\/p>\n

\"Figure<\/a>

Figure 1: Typical pitch relationships and constraints in 20\/16\/14 nm double patterning layers (Mentor)<\/p><\/div>\n

However, in some process layers (beginning at 12nm), you can meet the minimum opposite-mask spacing and minimum width, but the second-neighbor shape can still be closer than the minimum same-mask spacing from the reference shape. Because of this, it is possible to have an opposite-mask separator constraint spacing requirement between the reference and second-neighbor shapes (Figure 2).<\/p>\n

\"Figure<\/a>

Figure 2. New pitch relationships and constraints in double patterning layers at 12nm and below (Mentor)<\/p><\/div>\n

Forbidden pitches<\/h4>\n

Another new spacing constraint at advanced nodes involves constructive and destructive interference patterns that can create specific spacings that are not reliably printable. These spacings, known as forbidden pitches, typically appear as a specific spacing or range of spacings that prohibit the two involved polygons from being on the same mask, even if they are more than the minimum same-mask distance from each other (Figure 3).<\/p>\n

\"Figure<\/a>

Figure 3. Forbidden pitch relationships and constraints (Mentor)<\/p><\/div>\n

Double-spaced lines<\/h4>\n

With self-aligned double patterning (SADP) techniques, allowed pitches are even more restricted, because the spaces are defined by the sidewalls [2]. Designers can create some variation in pitch by placing two mandrel shapes exactly two sidewall widths apart. The two sidewalls will merge to form a single dielectric space between them (Figure 4). For this double-spaced line to manufacture properly, both polygons must be the same color. Communicating this requirement to the coloring engine requires a same-mask separator that, unlike the traditional opposite-mask separator, tells the coloring engine that the two shapes must be on the same mask.<\/p>\n

\"Figure<\/a>

Figure 4: Double-spaced lines in SADP (Mentor)<\/p><\/div>\n

Double patterning error detection <\/strong><\/h3>\n

These new constraints have a big effect on double patterning error detection and visualization. Before, DP errors were based on the physical view of the data, in which the polygons and separators form a connected ring with a \u2018hole\u2019 in the middle. Any odd polygon count around this hole formed an error cycle, so visualization was accomplished by drawing a thin polygon line around the inner edges of the hole (Figure 5).<\/p>\n

\"Figure<\/a>

Figure 5. Traditional odd-cycle \u2018hole\u2019 error ring (Mentor)<\/p><\/div>\n

Because opposite-mask separators can now extend across the first-neighbor to the second-neighbor shape, it is possible to have an odd cycle of separator constraints based on three polygons in a row, and real DP errors can be missed because there is no \u2018hole\u2019. In other words, the cycle configuration in the physical space is no longer planar (Figure 6).<\/p>\n

\"Figure<\/a>

Figure 6. \u201cNo-hole\u201d non-planar odd-cycle DP constraint (Mentor)<\/p><\/div>\n

Those forbidden pitch constraints present another challenge to physical-based DP error detection methods. The nearest neighbor to a polygon may be far enough away to allow same mask coloring, but the second-neighbor shape may be located in a forbidden-pitch range and require color alternation. The separator communicating the color alternation requirement between the reference and second neighbor must cross the first neighbor in planar space. Because separators can now physically cross over polygons that are not involved in the error, it can appear as though those polygons are part of the error when they are not. Simply counting all the polygons \u2018touching\u2019 separators in an error ring can produce a false or missed error, depending on the situation, as shown in Figure 7.<\/p>\n

\"Figure<\/a>

Figure 7. Double patterning layout with non-involved polygons (Mentor)<\/p><\/div>\n

In this layout configuration, the cycle configuration in the physical space is no longer planar. Polygon \u2018x\u2019 and polygon \u20182\u2019 require color alternation between them, as do polygon \u20182\u2019 and polygon \u20183\u2019. Color alternation is not required between polygon \u2018x\u2019 and polygon \u20183\u2019, but the separator between polygon \u20182\u2019 and polygon \u20183\u2019 crosses polygon \u2018x\u2019. If polygon \u2018x\u2019 is included in the count, this configuration would be considered an even cycle of eight, when it is actually an odd cycle of seven, leading to a missed error.<\/p>\n

Designers may encounter similar situations with anchor-path violations (Figure 8). The color alternation requirements for this path are not compatible with the anchored shapes on each end. However, if polygon \u2018x\u2019 is mistakenly considered to be in the path sequence, the configuration would falsely be considered legally colorable.<\/p>\n

\"Figure<\/a>

Figure 8. Anchor-path violation with non-involved polygons (Mentor)<\/p><\/div>\n

Lastly, in the presence of both same- and opposite-mask separators, polygon count is no longer sufficient to determine an error, as shown in Figure 9. The first configuration appears to be an odd-cycle error, as there are three polygons involved. However, because the same-mask separator between the two bottom polygons requires them to be the same color, this configuration can actually be legally colored with two colors, and is not an error. The second configuration appears to be a legal even cycle. However, the same-mask separator requiring the same color for both of the bottom polygons makes this configuration not legally colorable with two colors, and therefore is actually an error.<\/p>\n

\"Figure<\/a>

Figure 9. Layout configurations with opposite-mask and same-mask separators (Mentor)<\/p><\/div>\n

The solution? Abandon error detection via polygon count in a planar physical arrangement. Instead, the cycles are analyzed in their virtual graph representation, and validity is based on color parity rather than node count.<\/p>\n

Figure 10 shows a cycle of four polygons with a same-mask edge at the bottom. In a count-based approach, you simply count polygons from 1 to 4 to find this is an even cycle, which is presumed to be legal. For the color-parity-based approach, you use a virtual graph, starting at one of the nodes (in this case, the upper left node). This node starts with a parity of 0, and the parity changes as the cycle is traversed. As you move counter-clockwise to the bottom-left node, the parity changes to 1 because of the opposite-mask edge. As you move to the bottom-right node, the parity remains 1 because you have a same-mask edge. Moving to the upper-right node, parity flips back to 0 because of the opposite-mask edge. Finally, you move back to the upper-left node and flip the parity again to a 1, because of the opposite-mask edge. Since the parity on that node must be both a 1 and a 0, you have found an error.<\/p>\n

\"Figure<\/a>

Figure 10. Polygon count vs. parity analysis for DP error detection (Mentor)<\/p><\/div>\n

Double patterning error debugging<\/strong><\/h3>\n

While detecting valid double patterning errors is the first challenge at advanced nodes, it is useless unless the designer can understand and resolve the problems. Traditional error-ring and anchor-path visualization markers do not effectively annotate and explain these types of errors. There are three primary issues in advanced error visualization:<\/p>\n