{"id":887,"date":"2010-05-01T16:42:43","date_gmt":"2010-05-01T16:42:43","guid":{"rendered":"http:\/\/www.edatechforum.com\/?p=887"},"modified":"2011-05-18T22:35:30","modified_gmt":"2011-05-18T22:35:30","slug":"not-the-one-that-got-away","status":"publish","type":"post","link":"https:\/\/www.techdesignforums.com\/practice\/technique\/not-the-one-that-got-away\/","title":{"rendered":"Not the one that got away"},"content":{"rendered":"<p>Design for manufacturing (DFM) lends itself quite well to pithy metaphors. It is the \u2018slippery fish\u2019 of the semiconductor industry\u2014you can never quite get a hold of it. Or maybe it is silicon\u2019s answer to Doctor Who\u2014every time you look at it, it seems to have a different face. Certainly, as DFM offers new challenges with each successive process node, it is the very definition of a moving target.<\/p>\n<p>The purpose of this special issue of EDA Tech Forum is to try and cut through some of the confusion and even frustration that surrounds DFM as a concept. We cannot promise \u201cDFM for Dummies,\u201d but we do hope to give you a sense of how you might manage the process.<\/p>\n<p>A few general observations. Yes, all chip companies have always done DFM in the sense that all designs have always had to be manufacturable, and in reasonable volume. However, DFM here refers to a group of challenges presented from\u2014effectively\u2014130nm and below. Many, but not all of these have to do with trying to print features that are smaller than the wavelength of the light used to produce them. Others are the result of the physics that apply and the havoc that defects can wreak when dealing with sub-micron features. And, of course, there is the beast that is leakage power.<\/p>\n<p>In that regard, DFM is not about to stop changing. Each new node presents something new, requires new tools, and demands that they be used at different stages in the design flow. One good idea\u2014if you have not already adopted this posture\u2014is therefore not to even think of DFM tools in and of themselves, but rather to think of the DFM awareness of all the tools you use. We are dealing with something that is more a pervasive concept than a particular step in the design process.<\/p>\n<p>It is also useful to see DFM in the context of a wider challenge facing today\u2019s designers. Everything is connected. In much the same way as we need more concurrency in terms of hardware and software design for today\u2019s system-on-chips, DFM is also driving much more cross-disciplinary cooperation. Tools used early in a flow will only work if they are informed by usable data and intellectual property from those whose primary concern may be manufacturing. That is just one example. The dialog between all specializations must be detailed and constant.<\/p>\n<p>There is a significant design management challenge here and therefore a cost. So a final message might be: think practically. Which node do you need to target? Which node can you afford to target? Is time-to-market such a factor that your resources currently prevent you heading for the most advanced available process? Obvious questions, perhaps\u2014but again, the continuous shifts in the DFM agenda may have clouded them for many executives.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The purpose of this special issue of EDA Tech Forum is to try and cut through some of the confusion and even frustration that surrounds DFM as a concept. We cannot promise \u201cDFM for Dummies,\u201d but we do hope to give you a sense of how you might manage the process.<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[30,593],"tags":[218,875,861],"coauthors":[51],"class_list":["post-887","post","type-post","status-publish","format-standard","hentry","category-dfm-dfy","category-dfm-special-edition","tag-dfm","tag-process-shrink","tag-semiconductor"],"_links":{"self":[{"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/posts\/887","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/comments?post=887"}],"version-history":[{"count":0,"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/posts\/887\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/media?parent=887"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/categories?post=887"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/tags?post=887"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/www.techdesignforums.com\/practice\/wp-json\/wp\/v2\/coauthors?post=887"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}