The Wally Rhines interview – Part One: Mentor as a Siemens business
Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
DFT
Drawing on hierarchical DFT to benefit all designs and flows
Hierarchical DFT is vital for large, complex designs. Users still to transition to the technique can nevertheless exploit its pattern reuse strategies as they move toward adoption.
An ISO 26262 approach to meeting the cost, quality, reliability, and integration needs of automotive ICs
Meeting ISO 26262 standards for automotive safety means applying a consistent approach throughout the design process. Here's how to start.
Accelerate silicon bring-up in a bench-top environment
How a new software-led flow speeds silicon bring-up within the Tessent environment, including a Cypress Semiconductor case study.
Best practice in scan pattern ordering for test and diagnosis
How to tune your scan pattern creation and application to cost-effectively match your test objectives.
Taking risk out of software-driven networking SoCs
How virtualization and integration with hardware testers are enabling networking SoCs in the billion-gate era.
Memory BIST for automotive designs
Behind the drivers for memory BIST innovation in areas such as power-on self-test, destructive and non-destructive techniques, and faster memory repair.
Reducing test costs through multisite and concurrent testing
How to save test time and test costs by doing more tests in parallel, increasing compression, pooling tester memory, managing branching - and more
FPGA-based prototyping 3: Which board do I need?
Part three of our series looks at the choices you face as you decide whether to build or buy a board.
FPGA-based prototyping 2: Understand the real cost
Part two of our series on FPGA-based prototyping looks at two critical factors to address before a project begins: budgeting and high-level implementation.
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