IC Implementation

November 26, 2015
Cadence mask coloring assistant

Mixed-signal designs prepare for coloring at 10nm

The arrival of the 10nm process will impact the way that designers approach custom and mixed-signal layout. Cadence Design Systems has made changes to its Virtuoso environment that deploy increased automation support and electrically-aware layout to deal with the upcoming issues.
October 29, 2015
Innovus chip layout

Cadence’s path to digital implementation on 10nm

The 10nm process will see changes to multiple patterning that demands changes in the implementation flow, along with an increased focus on the effects of variability.
October 21, 2015

FPGA-based prototyping 3: Which board do I need?

Part three of our series looks at the choices you face as you decide whether to build or buy a board.
September 28, 2015

FPGA-based prototyping 2: Understand the real cost

Part two of our series on FPGA-based prototyping looks at two critical factors to address before a project begins: budgeting and high-level implementation.
September 23, 2015

Mounting Fiji: How AMD realized the first volume interposer

AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
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September 7, 2015

FPGA-based prototyping 1: What’s all this buzz about?

This multi-part series addresses various aspects of FPGA-based prototyping. Future installments will address budgeting and implementation, but we start by looking at why the technique is generating so much interest.
August 24, 2015

A scalable RTOS and other essentials for embedded wearables development

The wearables market is booming. Successful development depends on assembling the right software and hardware tools. Here's a primer on what to look for.
July 20, 2015
TSMC finFET

Lessons learned in the finFET trenches

In sessions at the 2015 Design Automation Conference, engineers who had worked on finFET-oriented projects revealed how the technology has changed their design practices and where others may want to think twice about making the move.
April 30, 2015
Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com

Putting emulation on the map

Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
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February 3, 2015
Marco Casale-Rossi is a senior staff product marketing manager in the Design Group at Synopsys.

Automotive ICs drive advanced design at established nodes

Designers working on automotive ICs, to be built on established processes, can benefit from the power of design tools developed for advanced processes.
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