Expert Insights

Richard Pugh  |  October 7, 2019

Emulation makes it possible to stay on the road to autonomous vehicles

Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.
Topics: Digital Twin, EDA - Verification  |  Tags: ,   |  Organizations:   |  
Tom Anderson  |  September 25, 2019

Delivering on the advanced refactoring of design and verification code

An IDE is critical to top quality refactoring. Here are some tips and examples of how to achieve that.
Hossam Sarhan  |  September 19, 2019

Today’s analog/RF designs need interconnect inductance extraction

Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.
Topics: Electrical Design, EDA - IC Implementation  |  Tags: ,   |  Organizations: ,   |  
John Blyler  |  September 13, 2019

AI firsts (and more) at America’s SEMICON

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.
Adnan Hamid  |  September 10, 2019

Using portable stimulus for automotive random error analysis

The Portable Stimulus Standard helps overcome many of the verification challenges inherent in the strict requirements of ISO 26262.
Tom Anderson  |  August 19, 2019

Take advantage of the automated refactoring of design and verification code

Refactoring saves time and resuources by converting code to a common format and eliminates redundancies to make it more readable and maintainable.
Ron Press  |  August 15, 2019

Achieving more efficient hierarchical DFT for Arm subsystems

Hierarchical DFT for Arm-based SoCs is easier than ever with the arrival of a complete reference flow from Mentor and Arm.
Topics: EDA - DFT, - EDA Topics  |  Tags: ,   |  Organizations: ,   |  
Ashish Darbari  |  August 9, 2019

Spreading the word on formal in Bangalore

Doc Formal rounds up some of the the key observations about verfication made during July’s Synopsys VC Formal SIG event in India.
Puneet Sinha  |  July 24, 2019

Overcoming systemic design challenges for electric vehicles

EV design requires an ability to address interrelated tasks in areas such as architecture, performance, lifetime, range and charging speed.
Tom Anderson  |  July 23, 2019

Correct design and verification coding errors as you type

An IDE designed to catch typographical errors, missing declarations and inconsistent references in your code can hugely reduce your time in debug.
Topics: EDA - IC Implementation, Verification  |  Tags: , , , , , , , , , ,   |  Organizations:   |  

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