Chris Tice |  March 17, 2014
Verification of hardware and software has become a key bottleneck for chip design. Hardware-assisted verification is removing that bottleneck.
Richard Goering |  March 6, 2014
In a standing-room-only talk at the recent DesignCon conference, Eric Bogatin explained why comedian Henny Youngman could help them with signal integrity on PCBs.
Warren Stapleton |  February 27, 2014
The next boost to verification productivity will come from the integration of multiple strategies and tools.
Lisa Piper |  February 26, 2014
Increasingly complex state machines are driving the need for smarter ways of reporting errors such as deadlocks and unreachable code in the source RTL.
Mark Bollar |  February 11, 2014
Advanced tools are being applied to established nodes to produce advanced designs for volume markets.
Sudhakar Jilla |  February 6, 2014
The number of scenarios needed for MCMM timing analysis has skyrocketed. IC implementation calls for a concurrent approach to deal with the issue.
Colin Walls |  January 30, 2014
Effective low-power design for embedded-systems will take a new culture of close collaboration between hardware and software engineers.
Mark Bollar |  January 28, 2014
Advanced design isn’t restricted to emerging process nodes any more. Designers are using the latest tools to produce advanced designs on established nodes.
Jean-Marie Brunet |  January 20, 2014
It is not just a choice between EUV and multiple patterning for future nodes, but even between varieties of multi-mask technologies. How will you decide?
Steffen Schulze |  January 13, 2014
If EUV is further delayed until 8nm, the industry has to explore other options for patterning, and the effects they will have on the DFM flow.