system-level verification

December 14, 2017
Architectural Formal Verification - introduction and case study by ArterisIP and Oski Technology

Case study: How to apply architectural formal verification to system-level requirements

Introducing one of the latest refinements of formal and showing how ArterisIP and Oski Technology used the strategy on an ARM-based design.
Article  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations: ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors