non-volatile memory

February 28, 2018

How to achieve more accurate NAND soft-bit error injection

The article describes a pre-silicon strategy for the design and verification of SSD controllers that is faster and more flexible than ICE using physical NAND on a daughter-card.
Article  |  Topics: EDA Topics, EDA - Verification  |  Tags: , , ,   |  Organizations:
December 20, 2016
NVMe VIP featured image

Nine effective features of NVMe VIP for SSD storage

The open NVMe standard is helping non-volatile memory storage reach its true potential with increasingly rich verification support
Article  |  Topics: EDA - Verification  |  Tags: , , , , , , ,   |  Organizations:
August 23, 2011

Ensuring the reliability of non-volatile memory in SoC designs

This article describes various non-volatile memory (NVM) intellectual property (IP) alternatives with specific reference to their integration within system-on-chip designs targeting the 65nm process node and below. The article considers many of the strengths and vulnerabilities of these IP options, and then describes the tests that must be undertaken to ensure their long-term reliability, particularly [...]
Article  |  Topics: EDA - DFT, IP - Selection  |  Tags: , , ,   |  Organizations:
December 1, 2007

Mastering the memory maze

Since the early 1980s,most of the semiconductor business has been enthralled by the microprocessor, the PC and commodity DRAMs. For all the talk of potential ‘better markets’ and ‘more profitable businesses to be in’, PCs and their brethren came to represent 35- 40% of the industry’s output. They constituted the prime platform for not only […]

Article  |  Topics: EDA - ESL  |  Tags: ,   |  Organizations:

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