low power

May 1, 2009

A pulsed UWB receiver SoC for insect motion control

The article describes the context and need for embedded operating systems that are more responsive to the power management demands placed on today’s electronic devices. It reviews the design objectives for the two main types of power management, reactive and proactive, and examines how both can be implemented. For decades, scientists and engineers have been […]

Article  |  Topics: EDA - Verification  |  Tags: ,
May 1, 2009

Advanced RTL power-aware verification

Traditional verification tools struggle to deal with today’s increasingly sophisticated power management technologies. One major limitation is that they cannot deal with varying power states because they make a built-in assumption that devices are always fully powered on. Further, power-aware verification at the register-transfer level is proving increasingly problematic, although it is also becoming increasingly […]

Article  |  Topics: EDA - Verification  |  Tags: ,
May 1, 2009

Find your low-power path

Semiconductor vendors face increasing demands to lower power consumption. This trend has intensified in the last couple of years with the rejuvenation of the ‘green’ movement. In response, the industry has been getting smarter about low-voltage design, current-saving techniques for both the circuit and process levels, and coordinated power management. Meanwhile, programmers are concentrating on […]

Article  |  Topics: Embedded - User Experience  |  Tags:   |  Organizations:
May 1, 2009

The art of low-power physical design

The architectures that underpin today’s traditional place-and-route tools are showing their age, largely because their static timing analysis engines cannot handle more than two mode/corner scenarios. Thus limited, the software struggles to effectively implement low-power design techniques beyond such established concepts as clock gating and multiple threshold voltages. Designers run into difficulties when trying to […]

Article  |  Topics: EDA - DFM  |  Tags: , , ,
December 1, 2007

UPF delivers on power

Long before the first portable computer batteries exploded, and even before anyone had the first visions of building massive data centers in the cold northwestern states of Oregon,Washington and Alaska, power consumption by electronic devices was a tough problem for chip designers. The difference now is that we are trying to manage power in ever-smaller […]

Article  |  Topics: EDA - Verification  |  Tags: ,   |  Organizations:


Synopsys Cadence Design Systems Siemens EDA
View All Sponsors