Still using custom layout or place and route tools here? Ditch that time-consuming practice for a real database merge flow.
The article describes a pre-silicon strategy for the design and verification of SSD controllers that is faster and more flexible than ICE using physical NAND on a daughter-card.
A new technique has been developed to catch potential new lithography issues when little design data is available for incoming nodes.
How to get the best PV results by reducing computational demands; handling data more efficiently and exploiting parallelization.
In-design DRC is a technique that frees up engineers from many of the challenges of delivering AMS design under ever more complex design rules.
Richard Pugh shows how the fast-growing market for drone silicon highlights emulation's power where high data volumes are critical.
John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.
How emulation was used to debug out-of-spec power on a multicore ARM design using the AXI bus.
How to address increasingly complex patterning issues and debug them efficiently as design moves toward 12 and 10nm.
The COM methodology is being extended and more widely adopted across high-speed designs thanks to deeper tool integration.
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