Synopsys experts are now blogging about key issues in formal verification - how to use it, which techniques to apply, and the effort/reward ratio of doing so.
Oski Technology will offer a range of daily presentations at its DAC 2017 and useful technical advice in the main conference program.
Formal, AI and UVM form key parts of the OneSpin agenda for this year's Design Automation Conference.
Cadence has added two apps to its JasperGold lineup that handle clock-domain crossing and linting.
Japanese giant uses variable thermal simulation on automotive IC intended for harsh environments.
NVMe is driving the SSD market thanks to its many useful features, but at least five major challenges must inform your verification plan.
DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
The first Chinese edition of Accellera's conference series takes place in Shanghai next Wednesday (April 19).
Xpedition adds vibration and acceleration analysis to shorten physical PCB test times for ruggedized and safety-critical designs.
Formal enables substantial fault pruning and more definitive fault injection for ISO 26262 using techniques such as sequential logic equivalence checking.
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