Validating test patterns is a notoriously tricky and laborious process. Mentor Graphics has some new ideas on that front.
Companies presenting at User2User Santa Clara on April 26 include AMD, Microsoft, nVidia, Oracle, Qualcomm, and Samsung.
Mentor Graphics' recent deal with ARM illustrates how proliferation in design is influencing deals between tool and IP vendors.
About 1,600 new UVM System Verilog verification IP memory models will cut testbench development time and offer more time to increase coverage.
Videos discuss formal verification planning, correct initialisation, writing constraints, developing properties, interpreting results - and knowing when you have done enough.
Mentor Graphics is looking to get yet more efficiency from its market-leading Veloce emulator family through an OS upgrade and new task-specific Apps.
Verification specialist's DVCon activities are headlined by a panel on emulation and static verification.
Mentor Graphics chairman and CEO Wally Rhines will deliver the DVCon keynote as the vendor sets a deep agenda for the conference.
A look at techniques to trap complex errors caused by signals crossing clock, reset and power domains is the focus of this upcoming webinar
Driving down energy consumption for the IoT, making portable stimulus deliver real benefits and the practical benefts of a globalizing DVCon.
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