Verification

May 16, 2017

Cadence adapts Jasper tools for CDC and lint

Cadence has added two apps to its JasperGold lineup that handle clock-domain crossing and linting.
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May 12, 2017

Toshiba case study describes advanced thermal simulation

Japanese giant uses variable thermal simulation on automotive IC intended for harsh environments.
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May 3, 2017

Master the verification challenge of PCIe-based NVMe storage

NVMe is driving the SSD market thanks to its many useful features, but at least five major challenges must inform your verification plan.
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May 2, 2017

Wally Rhines looks beyond ‘endless verification’ to the system era

DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
April 13, 2017

DVCon China looms as submission deadline for Europe approaches

The first Chinese edition of Accellera's conference series takes place in Shanghai next Wednesday (April 19).
March 6, 2017

Mentor’s Xpedition virtualizes simulation for ruggedized, safety-critical designs

Xpedition adds vibration and acceleration analysis to shorten physical PCB test times for ruggedized and safety-critical designs.
March 2, 2017

How formal concentrates ISO 26262 fault analysis

Formal enables substantial fault pruning and more definitive fault injection for ISO 26262 using techniques such as sequential logic equivalence checking.
February 16, 2017

Mentor launches new Strato emulation platform

StratoM hardware has 2.5B-gate capacity and can scale to 15B gates. Throughput claimed at 5X faster than earlier Veloce generation.
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February 15, 2017

DVCon US 2017 preview: Mentor Graphics

The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.
November 11, 2016

Webinar focuses on Eldo RF verification of Tanner-based designs

On-demand seminar explains how to exploit recently announced integration of Tanner and Eldo suites for sensor, IoT and other design types.
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