Mentor will present seven papers during the ARMTech Con and a dedicated session, and exhibit at Booth #606.
DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
Virtual prototyping case study focuses on address mapping, clocking and QoS in DDR memory interface optimisation
Case study applies virtual prototyping to optimise address mapping, clock frequency, and Quality of Service configurations to meet DDR performance goals.
An overview of the vendor's busy DAC program from panels to technical sessions to a one-to-one with Wally Rhines.
But the bridge standard's European backers still need greater support from the big EDA vendors.
The leading EDA analyst also charts growth for RTL and IC CAD in 2014 Market Share Summary, and highlights system-driven shifts in tool evaluation.
Whether you're going to DAC this week or not, it's worth remembering one of the other key factors that will inform your judgments on new tools.
EDA giant cites high-level synthesis' move into the mainstream as driven by IP integration challenges in striking deal for the HLS market leader.
The fifth generation of Forte Design System's Cynthesizer tool is a slice of system-level evangelism.
Docea Power extends power and thermal analysis tools to address complexity and sub-dividing responsibilities among architects.
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