Design to Silicon

October 9, 2018

Synopsys takes TSMC design into the cloud; IP to 7nm, 5nm and automotive processes

Synopsys is taking IC design on TSMC processes into the cloud with the launch of the Synopsys Cloud Solution, which will run on platforms from Synopsys, Amazon Web Services (AWS) or Microsoft Azure.
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September 12, 2018

Mentor automates silicon photonics layout

The LightSuite Compiler produces designs based on Python descriptions and certifies them DRC-clean through hooks into the market-leading Calibre DFM suite.
August 16, 2018

IBM and Synopsys to apply DTCO to post-finFET process development

Collaboration on DTCO offers IBM a better way to evaluate combinations of transistor architectures, materials and other process technology innovations using design metrics, before real wafers become available for physical experimentation.
March 23, 2018

Layout schema generation speeds early-stage yield learning

LSG generates random design-like test vehicles to enable more detailed pre-ramp analysis for incoming nodes.
March 9, 2018

DATE 2018 preview: Mentor

DATE highlights for Mentor include a 90-minute workshop on achieving functional safety for autonomous driving.
February 16, 2018

SPIE Advanced Lithography 2018 preview: Mentor

Innovation and advances in EUV and OPC lead Mentor's offerings at SPIE in San Jose later this month.
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February 13, 2017

SPIE Advanced Lithography preview: Mentor Graphics

The major West Coast technical conference for lithography is just two weeks away and offers a packed agenda.
February 1, 2017

Five steps to faster FPGA implementation

Five steps you can take to speed up the FPGA implementation of a complex design, from structuring your design flow to debugging its output.
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December 19, 2016

White paper discusses optimising the efficiency of DDR memory subsystems

DDR memory subsystems need careful optimisation as demands on memory grow more rapidly than off-chip bandwidth.
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October 10, 2016

Speeding up AMS design in the age of finFETs

STMicroelectronics, Samsung, GSI Technology and Synopsys talk about the challenges of doing AMS design on finFET processes.
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