Any conference can only be as good as the feedback it gets. And next year's DAC team is actively looking for yours. It'll be worth your time.
Panel discusses Moore's law scaling beyond the 14nm node to 5nm, where economic, device, interconnect, materials, lithography and design issues abound
Building the internet of Things will demand collaboration and a healthy ecosystem
Head of TSMC R&D talks about what it will take to develop and use 10nm, 7nm processes, and a possible shift to using packaging to extend Moore's law scaling
New markets such as hardware cyber security, automotive and embedded software key to EDA industry growth
Samsung, Synopsys and ARM have been working together to create a finFET design ecosystem.
Whether you're going to DAC this week or not, it's worth remembering one of the other key factors that will inform your judgments on new tools.
Managing finFET variability issues without extending design times is key to extracting the most from the new processes, key players told a panel at the recent SNUG meeting in Santa Clara.
Registration is free-of-charge to attend Mentor, Oracle and Samsung keynotes and choose from nine technical tracks at one-day event.
Glass may be the high frequency interposer option given silicon concerns about power and noise. TSMC adds another pathfinder to its 3D arsenal.
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