But the bridge standard's European backers still need greater support from the big EDA vendors.
...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
Samsung bases PRISM and FLARE defect analysis and optimization on Mentor Graphics' Calibre and Tessent. Yields rise. Ramps shorten.
Flow exploration helps designers establish best approach to advanced network processor implementation on Samsung finFET process
Collaboration between ARM, TSMC and Synopsys reveals challenges of 10nm finFET design flows.
Ten cores in three clusters help match smartphone power/performance to app load and usage at MediaTek, thanks to Synopsys design exploration tools
Electronics design needs to cope with a combination of major brands and tiny start-ups looking to exploit its skills even where their resources are thin.
Atrenta's SpyGlass line and others to be absorbed in Verification Continuum and Galaxy as part of EDA's latest major consolidation.
An overview of Cadence's activities at DAC and a last-minute call-out if you want to register for its breakfast and luncheon sessions.
Review highlights from Mentor's activities at DAC and grab your last chance to register for in-depth technical sessions.
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