Cadence Design Systems has developed a visual timing analyzer for Allegro that tunes signals used by high-speed protocols such as DDR4, PCI Express, and SATA.
Turning transmit power up may save energy on TD-LTE, according to envelope-tracking specialist Nujira.
Chip pricing could see a significant uptick because of reduced investment in fab capacity, according to Future Horizons.
Yokogawa has pulled together power meter and oscilloscope functions into a hybrid instrument for teams working to increasingly stringent energy-usage regulations.
Highway1 has opened up Spring applications for its incubation service for hardware startups: trying to overcome the gap between prototype and product.
Valor additions aim to deliver shopfloor data to PCB ERP systems in real time... for the first time. And could boost ROI beyond 70%.
HP is throwing open its doors to other companies to bring in the necessary hardware and low-level software to build a new generation of servers, each specialized to a workload.
Altera will add a quad-core 64bit ARM processor complex to the Stratix 10 family of high-end FPGAs that will be made on Intel's 14nm finFET process.
ARM has launched at TechCon its own crop of online forums intended to let engineers collaborate and share ideas and has asked for IoT ideas.
Cadence Design Systems has issued a call for papers for the European leg of its CDNLive of events for 2014. The deadline for the Silicon Valley event is also looming: the call closes mid-November 2013.
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