Altera has moved to a 55nm embedded flash process to continue its Max series of non-volatile FPGAs.
To make a high-efficiency power supply XP Power used heat as an additional design variable with an architecture that turns conventional wisdom over one aspect of component reliability on its head.
Silicon Labs has developed a new type of parametric search tool that focuses on the selection of clock generators and jitter attenuators, making it easier to match them and downstream devices to the SoCs being designed into a PCB.
Two of the custom designs presented at the 26th Hot Chips in Cupertino exemplified the problems caused by increasing power density and the benefits of looking at heat removal at the system level.
High peak-to-average ratios inherent in 4G/5G modulation schemes are driving the circuitry controlling RF PAs to become more modeling-oriented.
Nokia Siemens Networks has built an instrument able to handle bandwidths up 1GHz to investigate the use of milllimeter-band radio for 5G communications.
National Instruments has developed a kernel for Spice analog simulations that can be downloaded for faster performance on the FPGAs inside CompactRIO hardware.
Cadence Design Systems has made three additions to its OrCAD line of PCB tools, largely aimed at data management and organization for projects.
New data transfer standard challenges IPC-2581 and extends Mentor's own ODB++.
Any conference can only be as good as the feedback it gets. And next year's DAC team is actively looking for yours. It'll be worth your time.
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