Blog Topics

March 21, 2018

VLSI Symposia adds day for AI

June's Symposia on VLSI Technology & Circuits will bring together a number of industry trends that extend from implantable biomedical applications to machine learning and cloud computing under the banner of technologies for ‘smart living’.
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March 19, 2018

Xilinx plans reconfigurable compute for 7nm FPGA generation

Xilinx plans to make reconfigurable computing the focus of its upcoming generation of FPGAs, which will be made on a 7nm finFET process at TSMC and expected to start sampling next year.
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March 19, 2018

Accellera begins IP security-assurance standards effort

Accellera Systems Initiative has begun a project that may result in the creation of a standard to address security assurance for semiconductor IP cores.
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March 9, 2018

DATE 2018 preview: Mentor

DATE highlights for Mentor include a 90-minute workshop on achieving functional safety for autonomous driving.
February 28, 2018

Cadence and Imec tape out 3nm interconnect test chip

Cadence and Imec have worked together on a project to tape out a test chip to explore manufacturing and design-rule options for the interconnect on future 3nm processes.
February 28, 2018

Accellera publishes beta portable-stimulus proposal

The Accellera Portable Stimulus Working Group has released for public review its current proposal for the verification standard it is working on.
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February 27, 2018

Synopsys UFS 3.0 IP doubles bandwidth to flash

Faster, lower power flash interface IP with built-in encryption/decryption speeds access to embedded and removable storage.
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February 25, 2018

55th DAC features design contest to build smarter drones

June's DAC will see the culmination of a contest involving more than 100 teams vying to demonstrate the best use of machine learning on embedded hardware in a flying drone.
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February 23, 2018

Mentor framework pulls devices into the cloud

With the aim of making it easier for embedded devices to cooperate in an IoT environment, Mentor has launched a cloud connectivity and management framework.
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February 22, 2018

Neural networks and vector processors deployed by Ceva for 5G handsets

Ceva has decided to include neural network, vector processing and customized instruction sets in an IP platform for 5G NR terminals.
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