Blog Topics

February 18, 2019

How to optimize your testbench-to-DUT connections

Testbench connections often depend on the virtual interface feature of SystemVerilog but other options - like abstract classes - can help.
February 15, 2019

China Focus 1: Wally Rhines maps startup and design growth

In the first of a weekly series on China's evolving design sector, we look at how the Mentor President and CEO identifies some of the key drivers.
February 12, 2019

Thin copper iodide films point to better transparent PMOS

Researchers working at Dongguk University have found thinning layers of copper iodide can make transparent, high-mobility p-channel transistors
February 12, 2019

IEDM looks to spin glasses and brain-like platforms

IEDM plans to expand its range of coverage for the 2019 event to encompass a range of novel computing platforms, from neuromorphic architectures to machines that emulate thermodynamic systems.
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February 11, 2019

DVCon USA 2019 preview: Mentor

DVCon USA is coming soon. Mentor's 2019 involvement includes a keynote from parent Siemens and a tutorial on managing your formal verification processes.
February 8, 2019

Taking an IoT edge design from proof-of-concept to prototype

A new paper describes a case study for a pressure-sensing IoT application based on the ARM DesignStart platform and Mentor IoT tool flow.
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February 6, 2019

Safety and test IP heads for automotive AI applications

Automotive AI specialist FABU has licensed a portfolio of IP from Synopsys to help assemble ISO 26262-compliant SoCs
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February 1, 2019

Fast process access gets Moortec onto 7nm

Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
January 31, 2019

Creating a $4B market for silicon photonics

It's been a long time coming, but silicon photonics is now entering commercial design for networking and grabbing attention in autonomous driving and sensors.
January 22, 2019

HPC futures report puts acceleration first

A report put together by Europe's HiPEAC high-performance computing research network argues computing is at an architectural turning point

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