Blog Topics

October 24, 2023

Flow evolution for the 3DIC/chiplet age

Chiplet-based 3DIC designs present new challenges for flows that integrate tasks from design exploration to physical verification.
October 16, 2023

Accellera updates portable stimulus standard

Accellera ’s board of directors has approved the version 2.1 of the Portable Test and Stimulus Standard.
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October 9, 2023

ITC 2023 preview: Siemens DIS

From tutorials to technical papers to special 'diamond' sessions, Tessent features large at ITC 2023.
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October 9, 2023

Tessent speeds ‘shift left’ drive for test at RTL

Tessent RTL Pro allows wrapper cells and x-bounding logic to be inserted earlier in designs.
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October 6, 2023

Fast instruction simulator expands to Arm

MachineWare has expanded its portfolio of high-speed instruction-set simulators to the Arm Cortex-A and -M architectures.
October 5, 2023

Vertical integration expands at IEDM

Vertical integration is one of the major focus areas at the upcoming IEDM conference, both in terms of transistors and the multiple channels that will go into them.
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October 3, 2023

Siemens and CEA link up on AI-assisted digital twins

Siemens and CEA-List have signed a deal under which the two organisations will research the combination of digital-twin and AI.
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September 28, 2023

Shift left: what it does and how to make it happen

Get to know more on the specific benefits of shift left and how to achieve easy adoption.
September 20, 2023

AI aims to cut CAD-model generation time

Ultra Librarian has developed an AI-driven CAD modeling engine that should slash the the time it takes to build component and subsystem models for PCB layout and system design.
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September 14, 2023

Cadence gives OrCAD access to cloud AI placement

Cadence has given its new release of OrCAD access to the cloud-based AI placer designed for its Allegro PCB-layout software.
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