IP

February 21, 2018

Bulk transistor design aims for near-threshold power cuts

Semiwise, a startup founded by University of Glasgow professor Asen Asenov and former CEO of Gold Standard Simulations (GSS), has developed a low-power CMOS transistor technology suitable for ultralow-power sensor nodes.
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February 13, 2018

Arm readying AI processor to catch up with ‘surprising’ demand

By the middle of this year Arm intends to deliver a processor designed specifically for deep-learning pipelines in edge devices, to capitalize on a move away from cloud computing for image and voice recognition.
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January 31, 2018

Analog blocks go digital for faster integration

Movellus has launched the first of a series of IP-creation tools with one that will build all-digital PLLs and integrate them into a design.
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January 28, 2018

UltraSoC delivers trace for RISC-V

UltraSoC has released its first implementation of processor trace for cores based on the RISC-V instruction set.
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January 23, 2018

ARM DesignStart case study demonstrates scheme’s ease-of-use

ARM and Mentor describe a proof-of-concept project using free tools and IP to combine AMS and digital.
January 23, 2018

Codasip updates processor-architecture tools

Codasip has launched the seventh generation of its Studio software for processor design and tuning, aiming to take advantage of the interest in RISC-V as a core instruction set for customized processors.
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January 18, 2018

Demand for better video, audio prompts HDMI 2.1 IP push

IP provides key building blocks for building better video and audio playback devices using HDMI 2.1
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January 5, 2018

Ceva dedicates hardware to deep learning

Ceva has developed its first processor architecture aimed squarely at deep learning.
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December 8, 2017

IP choice drives SSD controller design

Two-year-old design house make IP choice to use Synopsys DesignWare to build an enterprise SSD controller from scratch.
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December 6, 2017

European teams explore 3D integration tradeoffs

Two leading European research institutes presented their work on the feasibility and cost-effectiveness of monolithic 3D integration at this year's IEDM.
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