IP

January 18, 2017

Wafer expansion hits the buffers

What's old is new: 200mm wafers are returning and driving shortages while 450mm fades into the distance.
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January 9, 2017

VLSI Symposia issue calls for papers

Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits.
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December 22, 2016

Webinar discusses SoC security, area, and power trade-offs

SoC security strategies, costs and trade-offs are analysed in this detailed webinar.
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December 19, 2016

White paper discusses optimising the efficiency of DDR memory subsystems

DDR memory subsystems need careful optimisation as demands on memory grow more rapidly than off-chip bandwidth.
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December 7, 2016

HiSilicon licenses onchip debug engine for SOCs

HiSilicon has licensed UltraSoC’s semiconductor IP to build into SoCs for system monitoring, analysis, and optimization.
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November 24, 2016

Codasip adopts UltrasSoC debug for RISC-V cores

Codasip, a provider of processor cores based on the open-source RISC-V processor IP, has teamed up with UltraSoC to incorporate hardware debug and security features.
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October 25, 2016

ARM brings security to Cortex-M family

ARM has launched the first of a series of Cortex-M series microcontrollers based on the V8M architecture that incorporate the Trustzone security mechanism.
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October 24, 2016

Serdes deal to push copper server interconnect to 100Gbit/s

A licensing deal with GlobalFoundries has provided chipmaker Aquantia with the ability to speed up development of a 100Gbit/s link technology for data centers.
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October 17, 2016

Portable stimulus gears up to accelerate verification

Ahead of a tutorial on the technique at DVCon Europe with other EDA experts, Breker's Adnan Hamid talks about the need for portable stimulus in verification.
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October 11, 2016

Achronix moves into embedded FPGA

Achronix has decided to offer the FPGA technology it has developed as a set of embeddable cores.
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