IP

July 26, 2016

Cadence adds floating point to Fusion

Cadence Design Systems has added floating-point to its latest core intended for embedded signal processing.
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July 18, 2016

The IoT dream behind SoftBank’s ARM purchase

SoftBank cites IoT as its main reason for buying ARM, but could it change the relationship between customers and the processor designer?
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June 12, 2016

What’s the shortest time in the universe?

“It’s the time between putting out an open-source ARM core and getting a letter from an ARM lawyer,” says UC Berkeley professor Krste Asanovic. So, some design teams are turning to IP that started out as open source to provide more scope for experimentation.
June 9, 2016

2D tools adapt to create smaller monolithic 3DIC designs

Researchers at the Georgia Institute of Technology adapted conventional 2D layout tools to a two-layer monolithic 3D process that resulted in sizeable space and power savings.
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June 7, 2016

ARM accelerates POP deployment for Cortex-A73

A faster implementation program for the POP support IP for ARM's cores has delivered a 16nm finFET package for the Cortex-A73 shortly after the core's Computex launch.
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June 6, 2016

ARM recruits design houses and tools for quicker IoT projects

ARM aims to recruit more startups to develop IoT SoCs around the Cortex-M0 with design-house network and easier access to EDA tools.
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June 6, 2016

Menta launches fourth-generation embedded FPGA core

Menta SAS has launched an embedded FPGA core family that improves density over previous versions.
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June 1, 2016

Computex 2016: Microsoft makes play to be the VR OS

Microsoft has launched an OEM version of the Windows Holographic platform it has developed for its own AR headset, the HoloLens.
May 30, 2016

ARM aims for top-end phones with core pairing

ARM is combining a new high-end 64bit Cortex-A core with a reworked Mali graphics processor to support high-throughput applications such as virtual reality and machine learning.
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May 25, 2016

Register tools appear ahead of DAC

Ahead of June's Design Automation Conference, Agnisys and Semifore have both released tools aimed at reducing the overhead of implementing register-rich SoCs.
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