IP

April 22, 2015

UltraSoC pushes debug over USB

UltraSoC has added the ability to employ a USB 2.0 port instead of JTAG as the main debug access point on SoCs that use the company’s UltraDebug technology.
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April 22, 2015

ARM extends ISO 26262 safety work up to A-class

ARM is extending its work on ISO 26262 safety packages for automotive systems beyond the Cortex-R devices supported in a documentation release earlier this year.
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April 22, 2015

Fusion core targets voice-activated devices

Cadence has launched a processor core aimed at ‘always on’ signal-processing applications such as voice detection and recognition for wearables.
April 21, 2015

Neuroprocessing to drive next wave of processor cores, says Qualcomm

Deep learning offers the next major opportunity for specialist processors, Qualcomm's Karim Arabi claimed in his keynote at Mentor Graphics’ U2U in San Jose.
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April 21, 2015

Are you ready for design for crime?

Designers will need to take crime into account as part of their design signoff process, Wally Rhines argued in his keynote at Mentor Graphics' U2U San Jose 2015 conference.
April 20, 2015

Leakage analysis checks IP cores against crypto vulnerability

The Athena Group says it has developed countermeasures against side-channel attacks for its IP that offer the best protection currently available.
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March 18, 2015

ARM and Cadence agree to share IP access

ARM and Cadence have signed a deal that provides the IP teams at both companies with access to each other's cores.
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February 25, 2015

Cadence combines HLS tools in Stratus release

Cadence Design Systems has tied together the Forte Synthesiser and the internally developed C-to-Silicon tools into a new high-level synthesis (HLS) environment the company has titled Stratus.
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February 16, 2015

CDNLive Silicon Valley: last chance for early bird discount

The $99 discount registration price for Cadence's main US user conference will no longer be available after Friday (March 20)
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February 11, 2015

Accellera sets up group for one-stop verification stimulus

Accellera has set up a working group to develop a language-independent way of capturing and managing test stimuli that can be used across a wide range of verification environments.
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