IP

March 18, 2024

Arteris extends safety and speed for NoC

Certification to ISO 26262 for automotive systems and compatibility with the latest Arm9 generation of processors and the CHI-E interface are among the updates to Arteris’ Ncore cache-coherent on-chip network IP framework.
March 14, 2024

Two projects to deliver digital twins for software-defined vehicles

Arm is working with Cadence and Siemens on separate projects to support its plans in the SDV space.
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February 22, 2024

Cadence to work on IP for Intel 18A

Cadence has agreed to work with Intel Foundry Services on IP and flows for the 18A process, which will include backside power delivery and nanosheet transistors.
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December 27, 2023

Flow stability and chip reliability top the papers at DVCon Europe

The two best papers at the recent DVCon Europe underlined two of the issues that now face chip-implementation teams: efficient flows and reliability.
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December 22, 2023

Sustainability work puts numbers on chipmaking production at IEDM

Shifting to low-carbon generation for electricity would do much to cut the carbon footprint of semiconductor processes according to work shown at this year’s IEDM.
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December 6, 2023

Applied and CEA-Leti team up for novel materials R&D

Applied Materials and CEA-Leti have expanded their collaboration with the creation of a joint lab to develop materials useful for sensors, RF communications, and power devices, and with a focus on heterogeneous integration.
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December 4, 2023

EMA spins off IP, content and services activities

EMA Design Automation to launch sister company, Accelerated Designs, to help clients streamline processes, cut manual effort, and connect data.
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November 22, 2023

Arm gives Helium to low-end Cortex-M core

Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
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November 14, 2023

Imec makes virtual fab public for green analysis

Imec has a version of its imec.netzero virtual fab tool accessible to the general public with the aim of showing the environmental impact of IC manufacturing.
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November 3, 2023

Codasip pips Arm to commercial CHERI with RISC-V version

Codasip has put support for a set of instruction extensions intended to secure memory into its RISC-V core designs.

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