Mentor targets next-gen Ethernet with emulation
Vendor adds verification support for 25G, 50G and 100G Ethernet through emulator-based virtualization.
Embedded
Mentor’s Wally Rhines on M&A ‘merger mania’
...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
Software puts deep learning onto embedded DSP
Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.
Debug monitors look for deadlock
UltraSoC has added deadlock detection capabilities to its multicore onchip debug framework.
TSMC adds Cadence and Imagination subsystems for IoT
Foundry strikes two more Internet of Things subsystem deals for its 55nm ULP process based on Cadence Tensilica and Imagination MIPS/PowerVR cores.
Debug life cycle expands with on-chip infrastructure
By widening the range of resources that can be tracked within an SoC, Ultrasoc says it has uncovered ways to make debug a long-term tool for complex multicore designs.
Docea adds API to model power software interactions
Docea Power has added a programming interface to the latest version of its Aceplorer power-modeling software to show how chipset designs would fare under a variety of software-based power-management algorithms.
Intelligent software testing conference coming up online – and in Bristol
Online conference discusses software testing for avionics and security, code coverage, agile methodologies, behaviour-driven development and more
DAC 2015: Cadence Design Systems at the Design Automation Conference
An overview of Cadence's activities at DAC and a last-minute call-out if you want to register for its breakfast and luncheon sessions.
DAC 2015: Mentor Graphics at the Design Automation Conference
Review highlights from Mentor's activities at DAC and grab your last chance to register for in-depth technical sessions.
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