Embedded

December 18, 2015

Accellera and Mentor’s Dennis Brophy talks standards targets and DVCon

Driving down energy consumption for the IoT, making portable stimulus deliver real benefits and the practical benefts of a globalizing DVCon.
December 10, 2015

Cortus adds hardware floating point to low-area processor family

Cortus has added to its version 2 architecture a processor core that offers hardware support for floating-point code.
Article  |  Tags: , , , , , ,   |  Organizations:
December 1, 2015

Ultrasoc tweaks debug technology to act as SoC burglar alarm

Ultrasoc is adding security monitoring to its toolkit, providing SoC designers with a mechanism for their chips to warn of attempts by hackers to break into secure areas.
Article  |  Tags: , , ,   |  Organizations:
November 16, 2015

Cadence shifts emulation to the data center

Cadence Design Systems has designed its Palladium Z1 emulator to fit into the corporate data-center, improving virtualization and availability aspects of the system’s design.
Article  |  Tags: , , ,   |  Organizations:
November 12, 2015

DVCon Europe: UVM-SystemC backers ready first draft

But the bridge standard's European backers still need greater support from the big EDA vendors.
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.
November 11, 2015

UltraSoC adds CoreSight and Ceva debug support

UltraSoC is extending its debug support for a variety of processor cores through compatibility with ARM’s CoreSight debug system as well as support for Ceva’s DSP cores.
Article  |  Tags: , , , ,   |  Organizations: , ,
November 3, 2015

Wind River aims for cloud revenue in IoT strategy

Wind River aims to change its business model to collect money from cloud services for IoT instead of selling licences for embedded devices.
Article  |  Tags: ,   |  Organizations:
October 29, 2015

ARM targets cache-coherent GPU computing with CoreLink addition

ARM has developed a version of its CoreLink on-chip interconnect IP intended to support systems based on its big.Little processors combinations that need a cache-coherent GPU connection with lower latency and higher peak throughput.
Article  |  Tags: , , , ,   |  Organizations:
October 22, 2015

Ceva builds DSP chip and board for IoT prototyping

IP supplier CEVA has made a development platform intended to speed up the prototyping of IoT and similar devices based on its TeakLite-4 DSP core.
Article  |  Tags: , , ,   |  Organizations: ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors