November 16, 2015

Cadence shifts emulation to the data center

Cadence Design Systems has designed its Palladium Z1 emulator to fit into the corporate data-center, improving virtualization and availability aspects of the system’s design.
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November 12, 2015

DVCon Europe: UVM-SystemC backers ready first draft

But the bridge standard's European backers still need greater support from the big EDA vendors.
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.
November 11, 2015

UltraSoC adds CoreSight and Ceva debug support

UltraSoC is extending its debug support for a variety of processor cores through compatibility with ARM’s CoreSight debug system as well as support for Ceva’s DSP cores.
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November 3, 2015

Wind River aims for cloud revenue in IoT strategy

Wind River aims to change its business model to collect money from cloud services for IoT instead of selling licences for embedded devices.
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October 29, 2015

ARM targets cache-coherent GPU computing with CoreLink addition

ARM has developed a version of its CoreLink on-chip interconnect IP intended to support systems based on its big.Little processors combinations that need a cache-coherent GPU connection with lower latency and higher peak throughput.
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October 22, 2015

Ceva builds DSP chip and board for IoT prototyping

IP supplier CEVA has made a development platform intended to speed up the prototyping of IoT and similar devices based on its TeakLite-4 DSP core.
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October 19, 2015

Mentor targets next-gen Ethernet with emulation

Vendor adds verification support for 25G, 50G and 100G Ethernet through emulator-based virtualization.
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October 12, 2015

Mentor’s Wally Rhines on M&A ‘merger mania’

...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
October 7, 2015

Software puts deep learning onto embedded DSP

Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.
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