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September 20, 2016

UltraSoC to support RISC-V

UltraSoC plans to support the RISC-V open-source instruction architecture with its debug infrastructure and tools.
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September 20, 2016

Debut for safety-critical ARMv8 core

ARM has launched the first of its Cortex-R series of processors to be based on the v8R architecture, providing greater protection for software tasks from each other.
September 13, 2016

DVCon Europe to examine role of UVM, SystemC in system-level verification

DVCon Europe this year provides a venue for extending UVM, SystemC and TLM for faster, more effective verification its organizing committee claims.
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August 15, 2016

EEMBC updates automotive benchmark for scalability tests

EEMBC has released version 2.0 of its suite for measuring the performance of automotive powertrain tasks on multicore processors.
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August 12, 2016

Chinese dates set for Asia-Pacific editions of Mentor Forum

Wally Rhines headlines as keynote at free technical events set for Shanghai on August 30 and Beijing on September 1.
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July 26, 2016

Cadence adds floating point to Fusion

Cadence Design Systems has added floating-point to its latest core intended for embedded signal processing.
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July 18, 2016

The IoT dream behind SoftBank’s ARM purchase

SoftBank cites IoT as its main reason for buying ARM, but could it change the relationship between customers and the processor designer?
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July 12, 2016

EEMBC looks into heterogeneous compute

EEMBC has turned its attention to heterogeneous computing with plans to create a new set of benchmarks.
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June 20, 2016

Let’s lose the fins

DTCO work by GlobalFoundries and Qualcomm reported at VLSI Symposia shows the need to minimize fin counts in future finFET processes.
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June 12, 2016

What’s the shortest time in the universe?

“It’s the time between putting out an open-source ARM core and getting a letter from an ARM lawyer,” says UC Berkeley professor Krste Asanovic. So, some design teams are turning to IP that started out as open source to provide more scope for experimentation.

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