EDA

Despite the intense R&D going into storage-class and other novel forms of non-volatile memories, flash is set to continue as the bulk memory of choice, Micron executive claims in VLSI Symposia keynote.

Researchers from the UC Berkeley and Intel teamed up to develop an energy-tuneable RF front-end on a digital finFET process with no need for analog process options.

Mentor will be present throughout the DAC program but with a particular focus on machine learning, artificial intelligence and automotive challenges.

Functional safety specialist will demonstrate extensions to its own suite and co-host demos highlighting its collaboration with OneSpin Solutions.

The Electronic System Design Alliance will discuss its recent decision to join SEMI and highlight DAC's new Infrastructure Alley.

Power analysis specialist will showcase the 2.0 edition of its PowerBaum analysis and modeling suite at DAC.

Imec will at this week’s VLSI Symposia describe how it fabricated a form of magnetic memory suitable for use as a non-volatile cache onto 300mm wafers using CMOS-compatible processes.

Accellera has published version 1.0 of the SystemC Configuration, Control and Inspection (CCI) standard.

Synopsys applies AI to speed PrimeTIme, as part of wider strategy to exploit machine learning to ease chip design

Taiwanese ASIC specialist Alchip discusses use of Mentor PowerPro for low power on 16nm 24x24 array HPC chip in detail