EDA

April 22, 2014

Cadence to expand formal portfolio with Jasper buy

Cadence Design Systems has reached an agreement with Jasper Design Automation to buy the formal-verification specialist for $170m in cash.
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April 16, 2014

FinFET variability issues challenge advantages of new process

Managing finFET variability issues without extending design times is key to extracting the most from the new processes, key players told a panel at the recent SNUG meeting in Santa Clara.
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April 16, 2014

Verification perspectives: the growth of emulation

The first in a series of articles on how various vendors are addressing the flow's most challenging task looks at Mentor's strategy for emulation.
April 15, 2014

Common Platform foundry alliance to be wound down

But some research and process collaboration is set to continue in the background as Samsung, GlobalFoundries and IBM chart their own priorities.
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April 10, 2014

Mentor builds simulation-emulation bridge to ‘Verification 3.0’

Enterprise Verification Platform adds cross-over SystemVerilog, UVM, and UPF support for Veloce alongside new hardware and software debuggers.
April 7, 2014

Latest ITRS underlines slowdown in interconnect and IC scaling

The 2013 edition of the International Technology Roadmap for Semiconductors has been published. The latest set of tables underlines the slowdown in some aspects of scaling, particularly when it comes to metal interconnect.
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April 7, 2014
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DAC 2014 offers free exhibit entry for three days

The 51st Design Automation Conference, to be held in San Francisco in early June, is offering free exhibit floor entry for the full three days.
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April 3, 2014

Mentor’s User2User Silicon Valley conference this week

Registration is free-of-charge to attend Mentor, Oracle and Samsung keynotes and choose from nine technical tracks at one-day event.
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March 27, 2014

Intel and Altera extend foundry deal into interposer and full 3D

Deal quashes rumors that Altera was about to move its cutting edge production back to TSMC, but nor does it appear to be 'exclusive' for 3D products.
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March 26, 2014

Even EUV faces a 1D future, says IMEC

IMEC's Rudy Lauwereins explained at DATE 2014 how 1D routing for self-aligned multiple patterning is likely to be inevitable even if EUV makes it into production fabs.
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