Blog Topics

September 27, 2016

Ceva adds hardware to speed up deep learning

Ceva has launched the fifth generation of its vision-oriented DSP core family with an architecture tuned for the fast-growing area of convolutional neural networks and deep learning.
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September 20, 2016

UltraSoC to support RISC-V

UltraSoC plans to support the RISC-V open-source instruction architecture with its debug infrastructure and tools.
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September 20, 2016

Debut for safety-critical ARMv8 core

ARM has launched the first of its Cortex-R series of processors to be based on the v8R architecture, providing greater protection for software tasks from each other.
September 16, 2016

GlobalFoundries ports MRAM to 22nm FD-SOI

GlobalFoundries has introduced an embedded-MRAM option for its 22nm FD-SOI process: the 22FDX platform.
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September 13, 2016

DVCon Europe to examine role of UVM, SystemC in system-level verification

DVCon Europe this year provides a venue for extending UVM, SystemC and TLM for faster, more effective verification its organizing committee claims.
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September 12, 2016

Synopsys adds ultra-low power security processor IP

Ultra-low power security processor IP includes defences against side-channel attacks, data and instruction encryption, DSP options for sensor processing and more.
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August 30, 2016

Design trade-offs in using DDR4 memory for enterprise applications

A look at some of trade-offs involved in building large system memories for enterprise equipment using DDR4 IP.
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August 27, 2016

Creating a reference design flow for 10nm processes: video

Synopsys video details challenges of 10nm design and its collaboration with Samsung Semiconductor to build a full flow to address them.
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August 24, 2016

Cadence building photonics environment around Virtuoso

Cadence is creating a flow that the company believes will make it possible to bring greater predictability to photonics design.
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August 15, 2016

EEMBC updates automotive benchmark for scalability tests

EEMBC has released version 2.0 of its suite for measuring the performance of automotive powertrain tasks on multicore processors.
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