Blog Topics

November 24, 2016

Codasip adopts UltrasSoC debug for RISC-V cores

Codasip, a provider of processor cores based on the open-source RISC-V processor IP, has teamed up with UltraSoC to incorporate hardware debug and security features.
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November 15, 2016

Siemens agrees deal to buy Mentor Graphics

German industrial conglomerate to pay $4.5B to extend its PLM division into electronic chip and systems design.
November 14, 2016

Multicore Association to update performance-estimation standard

The Multicore Association has started work on the second version of its SHIM performance-modeling standard for SoCs.
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November 11, 2016

Webinar focuses on Eldo RF verification of Tanner-based designs

On-demand seminar explains how to exploit recently announced integration of Tanner and Eldo suites for sensor, IoT and other design types.
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November 9, 2016

Multicore standard works on fast communications

Work by the Multicore Association to provide a standard way for applications running on different processors to communicate with each other is leading to active implementations.
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October 26, 2016

Cadence maps out safety plan for semiconductor-design tools

Cadence Design Systems is nearing completion of a program that will provide a portfolio of documentation for users of its tools who need to obtain safety approvals for their designs.
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October 25, 2016

ARM brings security to Cortex-M family

ARM has launched the first of a series of Cortex-M series microcontrollers based on the V8M architecture that incorporate the Trustzone security mechanism.
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October 24, 2016

Serdes deal to push copper server interconnect to 100Gbit/s

A licensing deal with GlobalFoundries has provided chipmaker Aquantia with the ability to speed up development of a 100Gbit/s link technology for data centers.
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October 24, 2016

7nm finFET process techniques lead IEDM lineup

At the 62nd annual IEDM taking place in early December two of the leading groups in process development will take the wraps off their 7nm finFET technologies.
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October 17, 2016

Portable stimulus gears up to accelerate verification

Ahead of a tutorial on the technique at DVCon Europe with other EDA experts, Breker's Adnan Hamid talks about the need for portable stimulus in verification.
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