TCAD specialist GSS says nanowire transistors look practical down to 5nm but that designers need to carefully explore how the wires are shaped as quantum-confinement effects take hold
Cadence has launched the 16.6 release of its Allegro PCB-design portfolio, adding modules for manufacturing documentation and design-rule preparation aids.
Formal-verification specialist OneSpin is setting up its own equivalent of an app store, building on top of a formal engine the company now licenses to other companies.
Agnisys is adding automated verification of SoC register maps to its IDesignSpec tool for defining and specifying registers and their behaviours, deploying both a dynamic and a formal version.
Imagination Technologies plans to introduce support for virtualization across all its processor cores, including signal processors such as the Ensigma family, as part of a plan to improve SoC security.
ARM and Unicef have teamed up to try to find new sources of designs for the developing world, and to stimulate innovation there.
Design and manufacturing services company draws on big data to offer ASIC block optimisations
Startup Tortuga Logic has developed a toolkit for checking the security aspects of SoC hardware designs.
Automotive ethernet is the latest virtual reference design platform to be added to the family of models developed by Cadence to support its physical-layer IP cores.
Sonics is moving into power management with an approach intended to substantially automate much of the job of building finely grained power-gated SoCs.
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