Blog Topics

February 2, 2016

Cadence boosts compression with physical DFT tool

Cadence has use physically aware placement in a test tool that promises less routing congestion for scan test and which increases the potential for stimulus compression.
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January 26, 2016

OpenAMP brings control to multicore SoCs

The Multicore Association has started work on standardizing a set of APIs that aim to simplify communications between processors in heterogeneous multicore SoCs
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January 14, 2016

DesignCon 2016 preview: Mentor Graphics

HyperLynx leads the way for vendor at DesignCon with booth demos and a day-long modeling and analysis seminar.
January 14, 2016

Qt tightens open-source licenses

The Qt Company has changed the licenses it supports on the open-source versions of its user-interface software framework, removing the LGPL2.1 version.
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January 8, 2016

Prpl Foundation proposes security architecture

The Prpl Foundation has published a guide to techniques it claims will improve the security of embedded systems.
December 18, 2015

Accellera and Mentor’s Dennis Brophy talks standards targets and DVCon

Driving down energy consumption for the IoT, making portable stimulus deliver real benefits and the practical benefts of a globalizing DVCon.
December 15, 2015

GaN power makes progress at IEDM 2015

Researchers describe at IEDM 2015 how they are making gallium nitride fit into a wider range of power-handling applications and may even result in mass-market vertical transistors.
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December 11, 2015

IEDM keynote: cost scaling will swap architectural changes for area

According to ARM's Greg Yeric in his keynote at IEDM, even with cost improvements for multiple patterning, fewer designs will see the benefit of further silicon node scaling. Savings will come from design.
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December 10, 2015

Cortus adds hardware floating point to low-area processor family

Cortus has added to its version 2 architecture a processor core that offers hardware support for floating-point code.
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December 7, 2015

Cadence partners for photonic IC design

Cadence Design Systems has worked with Lumerical Solutions and PhoeniX Software to develop a flow for designing photonic ICs based on the Virtuoso custom-design platform.
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