Volume 5

September 1, 2008

Building reusable verification environments with OVM

This article reviews the reuse potential within the Open Verification Methodology, with special focus on four particularly fruitful areas: testbench architecture, testbench configuration control, sequences, and class factories.
June 1, 2008

STIX to the task

Before 2001’s historic downturn, the semiconductor industry was primarily driven by the corporate and enterprise markets. This bias led to a somewhat predictable three-year business cycle of peaks and troughs. Corporate buying practices, technology requirements and IT replacement policies are all relatively easy to predict—right down to the nature of the semiconductors that underpin the […]

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June 1, 2008

Start Here

With this fourth anniversary issue of the EDA Tech Forum Journal, we have begun to make a few changes—more will follow over the coming months. In terms of content, the most obvious change is that we have introduced a new section dedicated to the role of embedded technologies in the design fl ow. It is […]

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June 1, 2008

Sensium: A 1V micropower SoC for vital-sign monitoring

This paper describes the main design components and methodology priorities for development of the Sensium system-on-chip for wireless body sensor networks. The device is targeted at vital-sign monitoring and related medical applications. The SoC integrates an ultra-low-power wireless ISM band transceiver, hardware MAC, microprocessor, I/O peripherals, memories, 10b delta-sigma, analog-to-digital converter and custom interfaces. The […]

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June 1, 2008

Multi-corner multi-mode signal integrity optimization

Signal integrity (SI) is an ever-growing problem as more interconnect effects and fast clocks increase the chances of crosstalk noise and glitches as well as unexpected signal delays. There has been a significant increase in SI-related timing violations due to the increasing influence of lateral wire capacitance in designs at 65 and 45nm. A fast-increasing […]

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June 1, 2008

Migration of the Cell Broadband Engine to 45nm SOI

The paper describes some of the main challenges in the latest process shrink for the Cell Broadband Engine, developed jointly by IBM, Sony and Toshiba. The authors show how the move from a 65nm to a 45nm SOI process was achieved by concentrating on four primary goals: automating the migration; setting a 30% power reduction […]

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June 1, 2008

Making the move to ESL hardware design

Electronic system level (ESL) is typically defined as design above the register transfer level (RTL). When applied to hardware design, ESL is the process of describing hardware functionality at higher levels of abstraction to increase designer productivity and enable greater degrees of exploration. With ESL, hardware designers no longer spend most of their time designing […]

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June 1, 2008

Intel takes a new path from A to D

Justin Rattner will this year mark 35 years with Intel. His career with the technology giant has seen him collect numerous accolades, particularly for work in areas such as high performance computing (HPC). He was Intel’s first principal engineer and was its fourth member of staff to be named a fellow (he is today a […]

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June 1, 2008

Implementing an intelligent solar tracking control system on an FPGA

Given present-day demands for environmentally friendly, renewable energy sources, solar energy is becoming increasingly attractive. However, while solar energy is free, non-polluting and, in practical terms, inexhaustible, there remain significant inefficiencies in capturing it. For example, solar panels are traditionally fixed and in this configuration cannot capture the maximum amount of sunlight during changing weather […]

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June 1, 2008

Accentuate the practical

When engineers discuss the status and value of the Design Automation Conference (DAC), one topic tends to recur. Fairly or unfairly, the claim is that there has long been an inherent tension between DAC the technical conference and DAC the exhibition. In short, the technical conference has been seen as biased toward tool developers; the […]

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