Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
How the HPC company used Synopsys' Lynx Design System to standardise its flow and simplify migration to the next node.
How to speed project start-up, boost designer productivity and increase schedule predictability using design management tools.
The growing verification challenge, and how to address it by coordinating multiple debug strategies.
Debug of logic and testbench debug makes up 35% of chip design, and is growing as power-management and hardware/software issues become part of the task.
How Cadence, Intel and Xuropa accelerated the semiconductor design process by squeezing 15% more capacity out of a virtualized server farm
The efficient management and synchronization of design data is now a necessity and no longer something that is a ‘nice-to-have’. Design complexity continues to increase with one result being that development spreads across several groups (often in different places). A project may also have several thousands design files generated by various tools from different vendors […]