Assembly & Integration

April 23, 2018

How eFPGAs will help build the brave new world of AI

Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.
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March 29, 2018
Two wafers fabbed at Imec

3DIC technology provides performance boosts

3D integration technology has split into a number of different approaches, each of which brings a different combination of benefits in terms of performance.
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October 14, 2017
Michael Chen is Director, Design for Security, in the New Ventures Division of Mentor, a Siemens Business.

Making security a profit center for silicon

The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
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September 8, 2017

How HLS is giving shape to glasses-free 3DTV

High level synthesis (HLS) was adopted to realize innovative display IP as developed by a small core engineering team.
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August 7, 2017
Pedro Ricardo Miguel

Supporting higher-resolution displays without major system redesign

Using VESA's Display Stream Compression (DSC) standard to enable visually lossless performance and low latency for ultra-high-definition displays.
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July 18, 2017
Richard Solomon, technical marketing manager, Synopsys

Using CCIX to implement cache coherent heterogeneous multiprocessor systems

CCIX is a cache coherency protocol, based on PCI Express, for interconnecting high-performance heterogenous multiprocessing systems.
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January 31, 2017

Using the MIPI RFFE specification to simplify the control architecture of multi-radio SoCs

The MIPI RFFE standard provides a common approach to controlling power amplifiers, low-noise amplifiers, filters, switches, power management modules, antenna tuners and sensors in SoCs and systems.
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January 19, 2017
USB Type-C VIP featured image

USB Type-C: Verification challenges and solutions

The USB Type-C connector is versatile and already gaining traction in laptops, tablets and desktops. Here's how verification IP plays an important role in achieving the best implementation.
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January 18, 2017
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Are you formally connected?

To check the connectivity of an SoC, first you have to define what a connection is...
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December 2, 2016

Hierarchical signoff of SoC designs at advanced process nodes

Hierarchical signoff strategies for large SoCs at advanced nodes can be effective if sufficient attention is paid to reflecting the impact of cross-hierarchy parasitics.

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