A case study describing validation of the integration of USB3.0 and USB2.0 interface IP that illustrates broader challenges FPGA-based prototyping presents.
A look at the way in which the USB 3.0 Link Layer manages the port-to-port flow of data between the host and the device.
An overview of the USB 3.0 architecture, covering the USB Host, USB Device(s) and USB Interconnect, as well as the related receptacles, plugs and cables.
A first look at the role of the protocol layer in USB 3.0.
A look at the USB 3.0 functional layer, an application layer and system software on the host side, and a logical function and device on the device side.
A look at the role of four types of transaction in the USB 3.0 protocol layer: bulk, control, interrupt and isochronous.
A look at the USB 3.0 physical layer, including the PHY and the physical connection between two ports, which is carried on two differential data pairs.
What ARM learnt when it ran a Mali GPU-based test chip through a Synopsys tool flow onto a TSMC 20nm process
Formal verification techniques are becoming more widely used as the size and complexity of SoCs and increases.
How Cisco eliminated iterations in the ASIC handoff of a gigahertz networking chip by using physically aware synthesis
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