How Synplify makes it easier to use IP in FPGA-based designs, and package your own IP for secure reuse, on Altera and Xilinx devices
A look at the challenges of designing chips for the Internet of Things, or IoT, and some of the responses to those challenges
Fab and IP vendor collaboration is making pattern matching-based libraries a vital component of DRC accuracy and efficiency. Learn how to take advantage.
A look at a tool and a flow that makes it easier to put designs on to a HAPS physical prototyping system for verification, debug and software development purposes
FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
IC designers are becoming increasingly worried about the possibility of third parties inserting malicious 'trojan' circuitry into their ICs.
The increased use of IP and a rise in process variability is driving a move to look at alternatives to traditional low-skew clock distribution strategies.
The encryption chain for today's highly collaborative designs needs to be managed with care.
An in-depth look at the role of FPGA-based prototyping and the validation use cases it offers when integrating complex blocks.
The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
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