Architecture & Design

February 14, 2018
Michael Thompson is the senior manager of product marketing for the DesignWare ARC processors at Synopsys

Bringing AI into our lives

Using specialised processors to implement key AI computation tasks such as CNNs.
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January 25, 2018
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Using hardware secure modules to protect SoCs

Building secure SoCs takes a methodical approach, careful study of possible attacks, and embedded hardware that can provide a Root of Trust
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January 9, 2018
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Choosing between DDR4 and HBM in memory-intensive applications

Exploring the tradeoffs between implementing DDR4 and HBM for high-bandwidth memory subsystems.
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November 6, 2017
Rich Collins of Synopsys

Fighting the war of escalation in embedded systems security

The challenge for designers is to find ways of providing high levels of security in low-cost devices that have become worthwhile targets because of their role as gateways to more valuable information.
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August 7, 2017
Pedro Ricardo Miguel

Supporting higher-resolution displays without major system redesign

Using VESA's Display Stream Compression (DSC) standard to enable visually lossless performance and low latency for ultra-high-definition displays.
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July 18, 2017
Richard Solomon, technical marketing manager, Synopsys

Using CCIX to implement cache coherent heterogeneous multiprocessor systems

CCIX is a cache coherency protocol, based on PCI Express, for interconnecting high-performance heterogenous multiprocessing systems.
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July 11, 2017
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Applying sub-threshold circuit techniques to IoT device design

Operating at near-threshold or sub-threshold voltages reduces static and dynamic power consumption, at the cost of design complexity.
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June 29, 2017
Gordon Cooper

High-resolution visual recognition needs high-performance CNNs

Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.
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May 9, 2017
John Swanson John Swanson is senior marketing manager for DesignWare IP at Synopsys.

Building faster data centers with 25G Ethernet

The rising bandwidth demands of data centres have driven the development of 25G Ethernet, which will also form a pathway to 100G.
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May 8, 2017
Dr Walden Rhines is Chairman and CEO of Mentor - A Siemens Business

The Wally Rhines interview – Part One: Mentor as a Siemens business

Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.

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