EDA Topics

April 24, 2023
Matthew Welsh, Siemens DIS

Welcome to the part model era

Standards-based digital threads will revolutionize design through part models that deliver trust, traceability and context across components.
February 28, 2023
Dr. Lauro Rizzatti is a verification consultant and industry expert on hardware emulation. Previously, he held positions in management, product marketing, technical marketing and engineering.

Shift left to tackle key O-RAN verification challenges

O-RAN compatible Radio Unit (O-RU) and Distributed Unit (O-DU) verification no longer needs to wait until the post-silicon stage.
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February 8, 2023
Nebabie Kebebew is a senior product manager at Siemens EDA.

How to migrate SoC design to the cloud

Moving part of all of a design flow to the cloud involves careful preparation and evaluation as there is no 'one-size-fits-all'.
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January 26, 2023
3D IC workflow democratization

Give the people what they want: toward making 3D IC mainstream

Learn more about the five interconnected workflows that are democratizing next generation design in the emerging chiplet age.
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January 19, 2023
Connectivity Management Feature - Jan 23

Putting it all together to accelerate 3D IC design

Learn how connectivity management solutions help you manage the multiple formats in which 3D IC components are delivered.
December 23, 2022
Hossam Sarhan is a senior product engineer in the Calibre Design Solutions division of Siemens Digital Industries Software, supporting the Calibre PERC reliability platform and Calibre parasitic extraction tools. Hossam received his B.Sc. from Alexandria University, Egypt, his M.Sc. degree from Nile University, Egypt, and his Ph.D. from CEA-LETI, Grenoble, France.

Reliability verification simplified for multi-power domain designs

Automating reliability verification with tools that offer packaged checks provides greater consistency and accuracy across an increasingly complex process.
December 23, 2022

Connect SystemC models using UVM Connect

Learn how UMVC helps bridge between SystemC and System Verilog using transaction level modeling for test and library efficiency.
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October 17, 2022
Round Table Logo

Rising to the verification challenge of open source

Fast emerging options, like RISC-V, could foster massive growth in design but verification still needs commercial tools, a Semicon West panel found.
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October 6, 2022
3D-IC Stack LVS Connectivity

Building confidence and flexibility in 3D-IC system level design

3D-IC presents major connectivity challenges in maintaining a golden netlist and managing necessary exceptions. Learn how to manage them.
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September 7, 2022
symmetry verification featim

Interactive checks mean faster, more accurate symmetry verification

Symmetry verification for analog and custom IC needs to evolve beyond current time-consuming and hard-to-use techniques.
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