ESL

April 14, 2010

SystemC AMS—holistic analog, digital, hardware and software system-level modeling

One year after the publication of a draft, the analog and mixed-signal (AMS) extensions to SystemC AMS will be issued as a standard at the Design Automation and Test in Europe conference in Dresden in March 2010. At this point, SystemC/SystemC AMS will become the first ESL technology to cover continuous time modeling as well [...]
Article  |  Tags: ,
April 14, 2010

Dresden’s designs on DATE

Europe’s premier EDA conference moves to Silicon Saxony
Article  |  Tags:   |  Organizations:
December 1, 2009

Overcoming the limitations of data introspection for SystemC

The verification, test and debug of SystemC models can be undertaken at an early stage in the design process. To support these techniques, the SystemC Verification Library uses a concept called data introspection. It lets a library routine extract information from SystemC compound types, or a user-specified composite that is derived from a SystemC type. […]

Article  |  Tags: ,
September 1, 2009

Bringing a coherent system-level design flow to AMS

For two decades, the benefits of ESL and abstractions have been supposedly confined to engineers working on digital designs and to system architects. Analog and mixed-signal (AMS) design has largely remained a ‘circuit level’ activity. This article shows that tools exist that now also allow AMS engineers to exploit abstraction, and that can make all […]

Article  |  Tags:
June 1, 2009

Bridging from ESL models to implementation via high-level hardware synthesis

The article describes a methodology that bridges the gap between SystemC transaction-level models (TLMs) that are used for architectural exploration and SystemC cycle-accurate models of hardware that typically follow much later in a design flow, after many sensitive decisions have been made. The behavior of the cycle-accurate models can be verified in the complete system […]

Article  |  Tags: , ,
June 1, 2009

Using TLM virtual system prototype for hardware and software validation

The article describes how a methodology based around scalable transaction level modeling (TLM) techniques can be used to enable software design to begin far earlier in a design fl ow and thus allow companies to bring designs to market faster, particularly in time-sensitive sectors. It is based on the creation of high-level hardware models that […]

March 1, 2009

Rapid design flows for advanced technology pathfinding

The paper describes several innovative modifications to standard design flows that enable new device technologies to be rapidly assessed at the system level. Cell libraries from these rapid flows are employed by a design flow description language (PSYCHIC) for the exploration of highly speculative ‘what if’ scenarios. These rapid design flows are used to explore […]

Article  |  Tags: , , , , ,   |  Organizations:
December 1, 2008

Streamlining software development for a hardware ecosystem

Software accounts for more than half the development cost for a complex system-on-chip (SoC) platform at the 45nm process node or below. The availability of fundamental software such as compilers, debuggers, operating systems and industry-specific middleware determines the success or failure of a chip design. In simple terms, if there is little or no software […]

September 1, 2008

Modeling embedded systems using SystemC extensions

SystemC AMS extensions introduce new language constructs for the design of embedded analog/mixed-signal systems. This paper presents the novel modeling language for analog and mixed-signal functions that supports design and modeling of telecommunications, automotive and imaging sensor applications at various levels of abstraction. A simple example illustrates how new features facilitate a design refinement methodology […]

Article  |  Tags:
September 1, 2008

Now this is a tough one

For the sake of clarity and sanity, let me first point out that you are reading an article written in the fall of 2008. The importance of this will become obvious when I reveal my topic: parallel programming for the multicore age. You thought I was about to claim first-past-the-post on a new technological challenge […]

Article  |  Tags: ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors