ESL

August 5, 2015
Power switch

‘Even the software guys are starting to talk in milliwatts’

System-level power is the next frontier for a power-intent standard – or rather a collection of them – being developed by a partnership between Accellera, Si2 and the IEEE.
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April 30, 2015
Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com

Putting emulation on the map

Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
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March 16, 2015
Brian Fuller is editor in chief at Cadence Design Systems.

Design reaches out from the edge

We are moving towards a "continuum of compute", ARM CEO Simon Segars said at CDNLive Silicon Valley, a trend that will reshape design.
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November 23, 2014
Cadence Palladium cluster

Acceleration homes in on power issues

Emulation and simulation acceleration technologies provide the means to more efficiently detect power issues before tapeout – and find the worst-case modes that need to be fixed.
May 15, 2014
Bill Neifert is chief technology officer of Carbon Design Systems. Bill has designed high-performance verification and system integration solutions, and also developed an architecture and coding style for high-performance RTL simulation in C/C++.

Bringing true power analysis to hardware/software co-design

While some HW/SW co-design and verification techniques are in place, a power analysis methodology is only just emerging
December 16, 2013
forte-hsl-2-featim

How high-level synthesis helps optimize low power designs – Part Two

Continuing our series on high-level synthesis (HLS) for low power design. Part Two details how HLS helps you make and evaluate architectural decisions.
November 14, 2013
Cadence virtual prototyping

A map of the prototyping ecosystem

Different users within a design team will have varying needs for prototype capabilities. What type of prototype to pick is not always 100 per cent clear. Here are some pointers on how to make the choice.
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November 1, 2013
Jack Erickson is director of product management at Cadence Design Systems.

Slow winter or new spring for hardware design?

Problems with process scaling make it seem as though the long era of innovative, lucrative hardware design is coming to an end. But is that really the case?
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October 21, 2013
Featured image for high level synthesis LP Part One

How high-level synthesis helps optimize low power designs – Part One

Going inside HLS' basics shows how it can deliver power savings over 50% for some applications.
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April 10, 2013
Richard Goering, senior manager of technical communications, Cadence

Focus on product creation for effective design

An increasingly important concept in design is that of product creation. An approach based on product creation looks beyond chip or board design.

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