DFM

June 1, 2005

A methodology of integrated post tape-out flow for fast design to mask TAT

Semiconductor devices are being fabricated with features that are less than half the wavelength of the available lithography exposure tools. Increasing circuit density has improved the complexity and performance of ICs but also led to serious patterning proximity effects. These effects make the chips almost impossible to fabricate without optical proximity correction (OPC) technology. Thus, […]

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June 1, 2005

Achieving better DFM: EDA tools pave the way to improved yield

Major yield-Inhibiting Issues At each successive process node, additional defect mechanisms appear and hinder the ability to achieve desired yield (Figure 1). The trend toward declining yields has led to a resurgence in the application of design for manufacturing (DFM) methodologies.Much of this reinvigorated effort relies heavily on a new breed of tools and technologies. […]

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June 1, 2005

The whole picture

Once upon a time, placing even the smallest question mark next to Moore’s Law was seen as something beyond heresy. Today, more and more people are voicing such thoughts in the mainstream. One of the most senior figures speaking out is Bernard Meyerson, vice president and chief technologist of IBM’s Systems & Technology Group. The […]

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