EDA Topics

A comprehensive guide to parasitics, how to perform parasitic extraction and the latest technologies available for this critical task.

RISC-V adoption is growing fast as is the ecosystem around the open-source core. Hardware and software are now vital for appropriate debug.

TCP-Net is Test Case Prioritization using End-to-End Deep Neural Networks and addresses the challenges of today's software-rich projects.

How the latest DFT techniques pave the way for quality and success for today's advanced designs.

Take a high level view of the AI strategies used within the Tessent family to improve across-the-board performance.

A deep dive into the adoption, selection and implementation of models that boost productivity and customer loyalty.

The Boundary Condition Independent Reduced Order Model (BCI-ROM) provides vital help in addressing growing electro-thermal challenges in SPICE simulation.

Standard physical verification (PV) check reviews within EDA tools can reduce time-to-tapeout and mitigate risk.

We have the technology. Learn how to 'shift left' with Calibre DesignEnhancer and meet IR, EM and PPA objectives.

Learn more about how the IJTAG family and associated standards are being enhanced for current challenges.