Compliance with aviation’s hardware design standard is seen as a ‘tough ask’, but EDA’s own evolution has made that process easier than you may think.
Designers working on automotive ICs, to be built on established processes, can benefit from the power of design tools developed for advanced processes.
Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’
FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
Lint is no longer just about checking RTL code. It already incorporates functional verification within a three-stage analysis. Time to look again at a 'familiar' technology.
Innovation in physical verification is driven by incoming nodes but new tools and features can and should be fed back up the technology chain.
Moving to a finFET process means considering process readiness, cost and yield, as well as the traditional power, performance and area advantages
Sign-off lithography verification is vital as we move beyond double to multi-patterning but changing responsibilities in the flow must be handed with care.
FinFET and 3DIC technologies bring with them not just higher performance but an increased need for accurate parasitic analysis.
Altera uses standardized design flows to help integrate Intel foundry rules, cut time to tape-out - and speed the evolution of its design flows.
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