Expert Insights - EDA

Luke Collins  |  June 25, 2015

Applying agile techniques to IC design

How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft
Joe Mallett  |  June 17, 2015

Eight tips for choosing your next FPGA tool

Eight issues to consider when choosing an FPGA tool, including risk minimisation, routing issues, ability to iterate, IP freedom and more
Topics: EDA Topics  |  Tags: , ,   |  Organizations:   |  
Mike Bartley  |  May 6, 2015

Achieving safety and security in SoC development

Designers will have to update development processes to achieve the rigorous safety certifications required in automotive, rail, avionics and similar markets
Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:   |  
Lauro Rizzatti  |  April 30, 2015

Putting emulation on the map

Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
Topics: EDA - ESL, IC Implementation, Verification  |  Tags: , ,   |  Organizations: , ,   |  
Brian Fuller  |  March 16, 2015

Design reaches out from the edge

We are moving towards a "continuum of compute", ARM CEO Simon Segars said at CDNLive Silicon Valley, a trend that will reshape design.
Pranav Ashar  |  February 25, 2015

DO-254 without tears

Compliance with aviation’s hardware design standard is seen as a ‘tough ask’, but EDA’s own evolution has made that process easier than you may think.
Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:   |  
Marco Casale-Rossi  |  February 3, 2015

Automotive ICs drive advanced design at established nodes

Designers working on automotive ICs, to be built on established processes, can benefit from the power of design tools developed for advanced processes.
Topics: EDA - IC Implementation  |  Tags: , ,   |  Organizations:   |  
Lauro Rizzatti  |  November 6, 2014

The budget case for emulation

Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’
Yervant Zorian  |  October 10, 2014

Finding and fixing faults in finFET memories

FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
Topics: IP - Assembly & Integration, EDA - DFT  |  Tags: , , , ,   |  Organizations:   |  
Pranav Ashar  |  September 30, 2014

The evolution of lint

Lint is no longer just about checking RTL code. It already incorporates functional verification within a three-stage analysis. Time to look again at a 'familiar' technology.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  

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