Expert Insights

Luke Collins  |  June 25, 2015

Applying agile techniques to IC design

How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft
Michael Thompson  |  April 20, 2015

Neural networks bring advanced object detection to embedded vision

Dedicated processors using convolutional neural networking techniques bring advanced vision techniques such as object recognition to embedded systems.
Ron Lowman  |  January 7, 2015

A holistic approach to IoT chip design

A look at the challenges of designing chips for the Internet of Things, or IoT, and some of the responses to those challenges
Yervant Zorian  |  October 10, 2014

Finding and fixing faults in finFET memories

FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
Topics: IP - Assembly & Integration, EDA - DFT  |  Tags: , , , ,   |  Organizations:   |  
Prasad Saggurti  |  August 27, 2014

Six key criteria for deciding to migrate to a finFET process

Moving to a finFET process means considering process readiness, cost and yield, as well as the traditional power, performance and area advantages
Topics: EDA - IC Implementation, IP - Selection  |  Tags: , ,   |  Organizations: , , , , ,   |  
Steve Cline  |  July 25, 2014

Using standardized design flows to cut time to tape-out – and speed design-flow evolution

Altera uses standardized design flows to help integrate Intel foundry rules, cut time to tape-out - and speed the evolution of its design flows.
John Ferguson  |  April 28, 2014

Protecting IP in a collaborative signoff environment

The encryption chain for today's highly collaborative designs needs to be managed with care.
Joe Kwan  |  April 3, 2014

Standard cell IP must pass the litho-friendly routing test

Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
Neil Songcuan  |  January 7, 2014

Using HAPS to streamline IP to SoC integration

The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
Topics: IP - Assembly & Integration, EDA - IC Implementation  |  Tags: , ,   |  Organizations:   |  
Mick Posner  |  December 16, 2013

Consistency key to gaining the advantages of IP integration

Consistency is vital to IP integration strategies that rely on developing an SoC using a hierarchy of FPGA-based prototypes.

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