Expert Insights

Ruud Derwig  |  July 11, 2018

Picking the right-sized crypto processor for your SoC

Choosing the right crypto processor implementation involves a complex set of design tradeoffs between speed, area, power consumption and flexibility. Using consistent benchmarks can help explore your options.
Topics: IP - Selection  |  Tags: , , , ,   |  Organizations: ,   |  
Gordon Cooper  |  May 24, 2018

The impact of AI on autonomous vehicles

Many car manufacturers are exploring the possibilities of autonomous vehicles. But what will it take to build sufficient AI performance into them to enable true autonomy?
Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , ,   |  Organizations: ,   |  
Steve Mensor  |  April 23, 2018

How eFPGAs will help build the brave new world of AI

Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.
Gordon Cooper  |  February 27, 2018

Optimizing power and performance trade-offs in CNN implementations for embedded vision

High-performance vision-processing algorithms need optimized CNN engines to deliver the right performance within the power budget of embedded applications.
Luke Collins  |  February 14, 2018

Bringing AI into our lives

Using specialised processors to implement key AI computation tasks such as CNNs.
Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:   |  
Rich Collins  |  November 6, 2017

Fighting the war of escalation in embedded systems security

The challenge for designers is to find ways of providing high levels of security in low-cost devices that have become worthwhile targets because of their role as gateways to more valuable information.
Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:   |  
Michael Chen  |  October 14, 2017

Making security a profit center for silicon

The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
Pedro Ricardo Miguel  |  August 7, 2017

Supporting higher-resolution displays without major system redesign

Using VESA's Display Stream Compression (DSC) standard to enable visually lossless performance and low latency for ultra-high-definition displays.
Topics: Embedded - Architecture & Design, IP - Assembly & Integration  |  Tags: , , , , ,   |  Organizations: , ,   |  
Richard Solomon  |  July 18, 2017

Using CCIX to implement cache coherent heterogeneous multiprocessor systems

CCIX is a cache coherency protocol, based on PCI Express, for interconnecting high-performance heterogenous multiprocessing systems.
Gordon Cooper  |  June 29, 2017

High-resolution visual recognition needs high-performance CNNs

Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.

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