Handling power dropouts in MSP430 energy-harvesting designs

By Chris Edwards |  No Comments  |  Posted: May 25, 2015
Topics/Categories: Embedded - Architecture & Design, Platforms  |  Tags: , , , ,  | Organizations:

Software for energy-harvesting designs needs to cope with sudden power failures. FRAM storage can reduce the power and performance penalties of full resets.

Energy harvesting presents a number of challenges to design that extend beyond the overall incompatibility that many of the energy sources have with traditional circuit design. They either develop current at very low voltages or, in the case of piezoelectric generators, very high voltages with barely any current.

A key issue to consider is what happens when the energy simply runs out. Although many energy-harvesting designs build in some kind of storage capacitor to capture as much charge as possible and then deliver it to the application, there will be situations where the solar, vibration or heat converter is unable to provide enough energy to keep the system going until the next opportunity for harvesting. This has knock-on effects on the software design.

Using traditional design techniques, when power is restored the system has to reset itself, initialize peripherals, and determine its status using data stored to non-volatile memory or external environmental conditions reported through the sensor interfaces. As a result, the system has to run many cycles before it can re-enter normal execution. Although regular storage of system data to non-volatile memory can help reduce the time it takes to restore normal behavior, traditional memories such as flash present an issue because of the large amount of charge they require to write new data.

Non-volatile options

Non-volatile memories such as magnetic RAM, resistive RAM or ferroelectric RAM provide more opportunities to store data through power losses because of their lower energy demand for data writes. However, for cost reasons and the relative immaturity of some of them technologies, such non-volatile memories are not yet integrated in the pipelines of microprocessors. The combination of FRAM and a set of software utilities provided by Texas Instruments for its 16bit MSP430 microcontrollers offers a compromise approach.

Evaluation board used by TI for testing the CTPL library

Image Evaluation board used by TI for testing the CTPL library

The Compute Through Power Loss (CTPL) library provides a way to avoid a full reset after power failure without forcing the application to continually, and wastefully, write system-state data to the FRAM block.

The library is designed for use with either the LPM3.5 or LPM4.5 modes of the MSP430, which disconnect the supply voltage from the microcontroller’s core, suspending its operation. These modes naturally cause the application to reset when waking up because the power loss causes neither application nor peripheral state to be retained.

When waking up from this mode, the application must check for the LPMx.5 reset source at the start of the program and execute a separate branch of code, forcing the reinitialization of both core system and application required peripherals in addition to the initialization of global variables by the compiler defined C-startup function that is executed before the main program. This increases the start up time and increases the complexity of applications.

Wakeup behavior

The CTPL utility library provides an easier approach for an applications programmer to use. Linker configuration files place all application data sections into FRAM where they are retained through LPMx.5 low-power modes. The utility will also allocate FRAM storage used to save the state of the application and critical system peripherals. Using the CTPL utility API calls the system data can be put into FRAM storage before a power failure and the utility will then put the device into the requested LPMx.5 mode to wait for a device wakeup or reset.

Upon device wakeup or reset the CTPL utility code intercepts the reset and restore the application and peripheral state from the FRAM storage. After restoring the state the utility returns back to the application and the next line of code is executed, removing the need for the application programmer add code to check for the reset at the start of the main() function.

The microcontroller needs some time to store the system data. According to TI, it takes approximately 124µs to save the microcontroller’s state if running at 8MHz. The energy needed for this is approximately 110nJ before the shutdown command isissued. TI has reported that even the standard recommended capacitors for the MSP430 contain enough charge to complete these operations, assuming a bare-bones, MSP430-only system. Adding more peripherals will naturally add more required capacitance but this is a likely component of any energy-harvesting design.

The library ensures that, if the state-saving fails to complete, the microcontroller will perform a reset on waking up to avoid processing potentially corrupt data.

Typically, one of the ADC inputs or on-chip comparators will be configured to detect the failing supply voltage and use an interrupt to trigger a CTPL shutdown. A timeout function allows the library to move back to normal operation if the voltage ramps up before the shutdown completes.

Comments are closed.


Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors