verification

November 29, 2017
Ashish Darbari is director of product management at OneSpin Solutions.

Doc Formal: The crisis of confidence facing verification II

In part two of this series, Ashish Darbari introduces a checklist to address verification challenges and build the meta model.
June 18, 2017

Portable stimulus

Accellera's Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
July 22, 2016
Dr Lauro Rizzatti, verification consultant

The emulator thrives as verification models mushroom

Emulators have come a long way since their first introduction nearly three decades ago.
January 8, 2016
ESL options - thumbnail image

The shape of system design and verification in 2016

2016 marks the 20th anniversary of the term Electronic System Level (ESL), introduced by Gary Smith in 1996. Where are we now? And how will developments this year push the frontiers of practical ESL design?
Article  |  Topics: EDA - ESL  |  Tags: , , , ,   |  Organizations:
September 12, 2015
Dr Lauro Rizzatti, verification consultant

Skeet shooting and design debug

In-circuit emulation is attractive but brings with it debug-visibility issues. There are ways to restructure the environment to make bug hunting much more deterministic.
August 21, 2015
Visual: cars speeding along a road

Why emulation performance doesn’t matter (on its own)

Emulation performance is a key metric in verification. But it is far from being the only consideration. How long it takes to get a design onto a verification platform and aspects such as debug are as important. These factors will control how verification platforms are deployed during a project's life cycle.
November 6, 2014
Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com

The budget case for emulation

Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’
October 28, 2014
Featured image for hybrid testbench article

Harness virtual machines to create an efficient ‘live’ hybrid testbench

This 'how to' guide shows how to combine the power of emerging and existing technologies for faster, more comprehensive test.
February 27, 2014
Warren Stapleton is a Senior Fellow in AMD’s verification methodology team.

Next wave of innovation in verification technology must come from integration

The next boost to verification productivity will come from the integration of multiple strategies and tools.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
September 18, 2013
Query - feat

A common methodology to manage X propagation in both design and verification

How all types of engineer can focus on X states that represent real risk, and set aside those that are artifacts of a design process.
Article  |  Topics: EDA - Verification  |  Tags: ,   |  Organizations:

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