OCV

March 1, 2021
machine learning solido featured image

Machine learning overcomes library challenges at the latest process nodes

From 16nm, new complexities hinder .lib file characterization and verification but machine learning now offers an efficient way of managing them.
March 13, 2019
Liberty Variation Format - Featured Image

Validating on-chip variation: Is your library’s LVF data correct?

Machine learning techniques help ensure the validity of Liberty Variation Format information for OCV analysis at lower process nodes.
March 1, 2007

Confronting chip assembly challenges

Until recently, hierarchical design flows have been favored for the implementation of multi-million gate SOCs. However the rapid increases in design size brought on by nanometer process geometries have seen engineers seek to cope with the inherently block-based nature of such flows by seeking greater concurrency between the block implementation and chip assembly stages in […]

Article  |  Topics: EDA - DFM  |  Tags: , ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors