mixed-signal integration

March 29, 2018
Two wafers fabbed at Imec

3DIC technology provides performance boosts

3D integration technology has split into a number of different approaches, each of which brings a different combination of benefits in terms of performance.
Article  |  Topics: IP - Assembly & Integration, EDA - DFM  |  Tags: , ,   |  Organizations:
November 26, 2015
Cadence mask coloring assistant

Mixed-signal designs prepare for coloring at 10nm

The arrival of the 10nm process will impact the way that designers approach custom and mixed-signal layout. Cadence Design Systems has made changes to its Virtuoso environment that deploy increased automation support and electrically-aware layout to deal with the upcoming issues.
October 28, 2015
Bruce McGaughy, CTO, ProPlus Design Solutions

FastSPICE simulators hit their expiration date

Although FastSPICE simulators are in almost every design flow, requirements are moving beyond the capabilities they can provide. Parallel processing provides a solution.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
May 17, 2014
Real-number modeling signal resolution function

Real datatypes and tools enable fast mixed-signal simulation

Wreal modeling brings fast methods for simulating mixed-signal designs into the digital environment. And tools have arrived that make it easier to incorporate existing analog IP.
Article  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
November 11, 2013
Brian Fuller is editor in chief at Cadence Design Systems.

Goodbye to the mixed-signal black box

In pursuit of better design methodologies coupled with shrinking design-cycles, real-number modeling is emerging as a smart verification choice.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations: ,
October 8, 2013
Cadence EAD flow

End mixed-signal infinite loops with electrically aware design

Electrically aware layout tools provide a more efficient alternative to time-consuming rip-up-and-retry practices in mixed-signal nanometer IC design.
October 2, 2013

Catching layout-dependent effects on-the-fly

New layout-dependent effects (LDEs) arise at each process node. This methodology updates LDE parameters and uses on-the-fly simulation for early detection.
Article  |  Topics: EDA - DFM, IC Implementation  |  Tags: , , , ,   |  Organizations:
April 10, 2013
Marco Casale-Rossi is a senior staff product marketing manager in the Design Group at Synopsys.

Time to take up the 3D integration challenge

It’s time to take up the challenge of applying 3D integration technology to IC design. The manufacturing process technology is maturing, the tool chains are in place, and the opportunities to broaden your market by applying a new form of systemic integration are growing.
Expert Insight  |  Topics: EDA - DFM, IC Implementation  |  Tags: , , ,   |  Organizations:
January 23, 2013

Real-number or wreal modeling

Real-valued modelling provides a way of speeding up the simulation of SoCs with significant analog content through the use of discrete-event solvers.
October 30, 2012
Mixed-Signal Methodology Guide

Verifying low-power intent in mixed-signal design

An exclusive extract from Cadence Design Systems' Mixed-Signal Methodology Guide provides an excellent overview of its discrete topic and a flavor of the book as a whole.
Article  |  Topics: EDA Topics, EDA - Verification  |  Tags: , , ,   |  Organizations: ,

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