memory

September 7, 2022

NVMe-oF – The future of cloud storage

NVMe over Fabrics (NVMe-oF) extends the memory standard for burgeoning data traffic and the demands of AI and machine learning.
March 3, 2022

Why comprehensive memory layout verification needs automated reliability checks

Because of the high analog content in memory designs, designers must understand how various effects impact reliability and performance.
November 4, 2021
UPMEM-PIM-DRAM-featured-image

How UPMEM ensured effective power delivery for its processor-in-memory design

PIM memory boosts efficiency by operating on data without moving it to the CPU but realizing this type of novel technology posed power integration and planning challenges.
December 10, 2019
Colin Walls

Self-test strategies for embedded systems

How to implement self-test across the four main areas where embedded systems can fail.
Expert Insight  |  Topics: Embedded - Integration & Debug  |  Tags: , , , , ,   |  Organizations:
September 9, 2016

The inside track on emulation growth

Analysts say there is a $1B market on the horizon. We talk with Mentor's Jean-Marie Brunet about where such a number could come from.
March 3, 2016

What’s cooking at the Flash Diner?

Flash is the ice cream of memory technologies - everybody loves it. But you need to build the right verification environment to extract the greatest benefit.
January 15, 2014
Featured image for Debugging with VPs - III

Debugging with virtual prototypes – Part Three

This part illustrates the technique using examples addressing memory corruption, multicore systems and cache coherency with particular reference to watchpoints.
June 2, 2011

Creating a rugged standard for embedded memory

Most memory module standards have not been specified with particular reference to extreme environments where shock and vibration may present significant risk. Rather, designers have had to use a number of workaround techniques, strapping or even directly soldering devices to the board. In addition, the drive toward smaller board sizes is presenting a number of [...]
Article  |  Topics: EDA - DFT  |  Tags: ,
December 1, 2008

No double-quick growth for DDR3

Lane Mason Marc Greenberg DDR3 DRAMs still languish around the edges of the market despite their supposed attraction in terms of power and performance, the widespread availability of product, and the presence of a supposedly ‘evolved’ ecosystem and implementation infrastructure. Just over 18 months ago, Intel launched a major Go To DDR3 market initiative at […]

Article  |  Topics: Embedded - Platforms  |  Tags: , ,   |  Organizations:
December 1, 2007

Mastering the memory maze

Since the early 1980s,most of the semiconductor business has been enthralled by the microprocessor, the PC and commodity DRAMs. For all the talk of potential ‘better markets’ and ‘more profitable businesses to be in’, PCs and their brethren came to represent 35- 40% of the industry’s output. They constituted the prime platform for not only […]

Article  |  Topics: EDA - ESL  |  Tags: ,   |  Organizations:

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