JTAG debugging

August 18, 2012

When good DFT goes bad: debugging broken scan chains

Scan chains help you test complex chip designs. But how do you test the scan chains themselves when they go wrong?
Article  |  Topics: EDA - DFT  |  Tags: , , , ,   |  Organizations:
July 11, 2012
tdf-jul12-mentor-ijtag-feat

Welcome to IJTAG: a no-risk path to IEEE P1687

Making a smooth transition to IJTAG, the scan-test strategy for IP blocks, without having to change your existing hardware.
Article  |  Topics: EDA - DFT  |  Tags: , ,

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